11257-801 AMI Semiconductor, Inc., 11257-801 Datasheet - Page 3

• Manufacturer Part Number: 11257-801
• Description: Low-Skew Clock Fanout Buffer ICs
• Manufacturer: AMI Semiconductor, Inc.

Figure 4: Pin Configuration
(FS6053)
January 1999
3.1
All outputs are enabled and active upon power-up, and all
output control register bits are initialized to one.
The outputs must be configured at power-up and are not
expected to be configured during normal operation. Inac-
tive outputs are held low and are disabled from switching.
3.1.1
Outputs that are not used in versions of this device with a
reduced pinout are still operational internally. To reduce
power dissipation and crosstalk effects from the unloaded
outputs, it is recommended that these outputs be shut off
via the Control Registers.
3.2
A logic-one written to a valid bit location turns on the as-
signed output clock. Likewise, a logic-zero written to a
valid bit location turns off the assigned output clock.
Any unused or reserved register bits should be cleared to
zero.
Serial bits are written to this device in the order shown in
Table 3.
SDRAM_16
SDRAM_0
SDRAM_1
SDRAM_2
SDRAM_3
SDRAM_6
SDRAM_7
VDD_I
CLK_IN
Power-Up Initialization
Unused Outputs
Register Programming
VDD
VDD
VSS
VSS
SDA
2
C
10
11
12
13
14
1
2
3
4
5
6
7
8
9
28-pin SOIC
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VDD
SDRAM_15
SDRAM_14
VSS
VDD
SDRAM_13
SDRAM_12
VSS
VDD
SDRAM_9
SDRAM_8
VSS
VSS_I
SCL
2
C
Figure 5: Pin Configuration
(FS6054)
SDRAM_16
SDRAM_0
SDRAM_1
SDRAM_2
SDRAM_3
SDRAM_6
SDRAM_7
VDD_I
CLK_IN
VDD
VSS
VDD
VSS
SDA
2
C
10
11
12
13
14
1
2
3
4
5
6
7
8
9
28-pin SOIC
3
Table 3: Register Summary
SERIAL BIT
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VDD
SDRAM_15
SDRAM_14
VSS
VDD
SDRAM_13
SDRAM_12
VSS
OE
SDRAM_9
SDRAM_8
SDRAM_17
VSS_I
SCL
10
11
12
13
14
15
16
17
18
19
20
21
22
23
0
1
2
3
4
5
6
7
8
9
2
C
SDRAM Control Register 0
SDRAM Control Register 1
SDRAM Control Register 2
Figure 6: Pin Configuration
(FS6057)
DATA BYTE
Byte 0
Byte 1
Byte 2
(MSB)
(MSB)
(MSB)
(LSB)
(LSB)
(LSB)
SDRAM_16
SDRAM_0
SDRAM_1
SDRAM_2
SDRAM_3
SDRAM_4
SDRAM_5
SDRAM_6
SDRAM_7
VDD_I
CLK_IN
VDD
VDD
SDA
VSS
VSS
2
C
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
32-pin SOIC
CLOCK OUTPUT
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
SDRAM_15
SDRAM_14
SDRAM_13
SDRAM_12
SDRAM_11
SDRAM_10
SDRAM_17
SDRAM_16
SDRAM_7
SDRAM_6
SDRAM_5
SDRAM_4
SDRAM_3
SDRAM_2
SDRAM_1
SDRAM_0
SDRAM_9
SDRAM_8
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
VDD
SDRAM_15
SDRAM_14
VSS
VDD
SDRAM_13
SDRAM_12
VSS
VDD
SDRAM_11
SDRAM_10
SDRAM_9
SDRAM_8
VSS
VSS_I
SCL
2
C
1.13.99