MSC100ABIRM Motorola / Freescale Semiconductor, MSC100ABIRM Datasheet - Page 20

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MSC100ABIRM

Manufacturer Part Number
MSC100ABIRM
Description
SC100 Application Binary Interface Reference Manual
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
Low-Level Binary Interface
The SC100 architecture uses little-endian memory representation byte ordering. The lowest addressable
byte of a memory location always contains the least significant bits of the value. Fundamental data is
always naturally aligned: a long word is 4-byte aligned, and a short word is 2-byte aligned.
2-2
fractional
long fractional
long fractional with
extension bits
double precision
fractional
char
unsigned char
short
unsigned short
int
unsigned
long
unsigned long
float
double
long double
(24-bit mantissa)
pointer
Type
Type
Table 2-1. Mapping of C Fundamental Data Types to SC100
short
long or int
typedef struct {
} xfrac;
typedef struct {
} dfrac;
C Type Definition
int
char guard;
int
int
Table 2-2. Mapping of C Fractional Types to SC100
lsb;
lsb;
msb;
(mem)
Size
16
16
32
32
32
32
32
32
8
8
Preliminary (April 2000)
(Dreg)
(mem)
Size
Size
40
40
40
40
40
40
40
40
40
40
16
32
64
64
(Dreg)
2x40
Size
(Rreg)
40
40
40
Size
32
32
32
32
32
32
32
32
32
32
(Rreg)
Size
NA
NA
32
32
Align
16
16
32
32
32
32
32
32
8
8
SC100 Application Binary Interface
Align
16
32
32
32
-128..127
0..255
-0x8000..0x7fff
0.0xffff
-0x80000000..
0x7fffffff
0..0xffffffff
-0x80000000..
0x7fffffff
0..0xffffffff
-1.17e-38..
1.17e+38
0..0xffffffff
-1.0 .. 0.99999
-1.0 .. 0.999999
-16.0 .. 15.999999
-1.0 .. 0.999999
Limits
Limits

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