MSC7119 Freescale Semiconductor / Motorola, MSC7119 Datasheet - Page 44

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MSC7119

Manufacturer Part Number
MSC7119
Description
Low-Cost 16-bit DSP with DDR Controller and 10/100 Mbps Ethernet MAC
Manufacturer
Freescale Semiconductor / Motorola
Datasheet

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Hardware Design Considerations
3.3
The following equations permit estimated power usage to be calculated for individual design conditions. Overall power is
derived by totaling the power used by each of the major subsystems:
This equation combines dynamic and static power. Dynamic power is determined using the generic equation:
3.3.1
Estimation of core power is straightforward. It uses the generic dynamic power equation and assumes that the core load
capacitance is 750 pF, core voltage swing is 1.2 V, and the core frequency is 300 MHz. This yields:
This equation allows for adjustments to voltage and frequency if necessary.
44
Power consumption. You can reduce power consumption in your design by controlling the power consumption of the
following regions of the device:
— Extended core. Use the SC1400 Stop and Wait modes by issuing a stop or wait instruction.
— Clock synthesis module. Disable the PLL, timer, watchdog, or DDR clocks or disable the
— AHB subsystem. Freeze or shut down the AHB subsystem using the GPSCTL[XBR_HRQ] bit.
— Peripheral subsystem. Halt the individual on-device peripherals such as the DDR memory controller, Ethernet
For details, see the “Clocks and Power Management” chapter of the MSC711x Reference Manual.
Power supply design. One of the most common ways to derive power is to use either a simple fixed or adjustable linear
regulator. For the system I/O voltage supply, a simple fixed 3.3 V supply can be used. However, a separate adjustable
linear regulator supply for the core voltage VDDC should be implemented. For the memory power supply, regulators
are available that take care of all DDR power requirements.
where,
Core
Memory
Reference
I/O
MAC, HDI16, TDM, UART, I
Estimated Power Usage Calculations
Core Power
C = load capacitance in pF
V = peak-to-peak voltage swing in V
F = frequency in MHz
Supply
P
TOTAL
P
CORE
MSC7119 10/100 Mbps Ethernet MAC Data Sheet, Rev. 6
= P
= 750 pF × (1.2 V)
CORE
Table 33. Recommended Power Supply Ratings
2
C, and timer modules.
+ P
C × V
Symbol
PERIPHERALS
V
V
V
V
DDIO
DDM
DDC
REF
2
× F × 10
2
× 300 MHz × 10
+ P
–3
DDRIO
mW
+ P
Nominal Voltage
–3
IO
= 324.0 mW
1.25 V
+ P
1.2 V
2.5 V
3.3 V
LEAKAGE
Freescale Semiconductor
CLKO
Current Rating
10 µA per device
1.5 A per device
0.5 A per device
1.0 A per device
pin.
Eqn. 3
Eqn. 4
Eqn. 5

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