T8531A-TL-DT Agere Systems, Inc., T8531A-TL-DT Datasheet - Page 31

• Manufacturer Part Number: T8531A-TL-DT
• Description: Multichannel programmable codec chip set. Dry-bagget, tape & reel.
• Manufacturer: Agere Systems, Inc.

September 2001
Agere Systems Inc.
Timing Characteristics
* Card address 0, bit offset 0 assumed.
† Card address 0 assumed.
Notes:
A is the position of the frame sync pulse in the delayed mode.
B is the position of the frame sync pulse in the nondelayed mode.
SDX
SDR
SCK
SFS
*
†
A
tSFHSCL
Figure 9. Timing Characteristics of PCM Interface Assuming 2.048 MHz SCK Rate
1
B
1
tSCLSFL
1
tSCHDXV
2
tFSHFSL
2
2
3
3
3
TIME SLOT 0
(continued)
4
4
4
tDRVSCL
5
5
tSCLDRX
5
6
6
6
7
7
7
8
8
8
9
10
11
TIME SLOT 1
12
13
tSCHSCL
tSCLSCH
14
Codec Chip Set
15
16
5-4233.a (F)
1
1
1
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