MEA-208 Zarlink Semiconductor, Inc., MEA-208 Datasheet - Page 9

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MEA-208

Manufacturer Part Number
MEA-208
Description
6+2 Ports Ethernet Access Controller
Manufacturer
Zarlink Semiconductor, Inc.
Datasheet
XpressFlow-2020 Series –
Ethernet Switch Chipset
2.1.2 Supported Memory Configurations
2.1.3 Bus Cycle Waveforms
© 1998 Vertex Networks, Inc.
1999
L_D[31:0] (Wr)
L_D[31:0] (Rd)
L_BWE[3:0]#
L_WE[3:0]#
L_OE[3:0]#
RAM Chip
L_ADSC#
128k x32
256k x32
L_A[19:2]
32k x 32
64k x 32
Size
L_CLK
L_CS#
# of RAM
P
Chips
1
2
4
1
2
4
1
2
1
R
A1
E
D1
Memory Size
Total Buffer
128k bytes
256k bytes
512k bytes
256k bytes
512k bytes
512k bytes
1M bytes
1M bytes
1M bytes
A2
L
I
Typical Local Memory Access Operations
M
L_WE[3]#
L_WE[3]# L_OE[3]# L_WE[2]# L_OE[2]# L_WE[1]# L_OE[1]# L_WE[0]# L_OE[0]#
L_WE[3]# L_OE[3]# L_WE[2]# L_OE[2]# L_WE[1]# L_OE[1]# L_WE[0]# L_OE[0]#
I
D2
----
----
----
----
----
----
----
N
Chip #3
A3
A
D3
L_OE[3]# L_WE[2]# L_OE[2]# L_WE[1]# L_OE[1]# L_WE[0]# L_OE[0]#
L_A[19] /
L_A[19]
A3+1
D3+1
R
----
----
----
----
----
----
Y
A3+2
D3+2
Read/Write Chip Select and High Address Bits
A3+3
6+2
I
D3+3
----
----
----
----
----
----
----
9
N
Chip #2
Ports 10Mb Ethernet Access Controller
A4
F
A4+1
O
----
----
----
----
----
----
----
R
A4+2
D4
L_WE[1]# L_OE[1]# L_WE[0]# L_OE[0]#
L_WE[1]# L_OE[1]# L_WE[0]# L_OE[0]#
L_WE[1]# L_OE[1]# L_WE[0]# L_OE[0]#
M
----
----
----
----
A4+3
D4+1
A
Chip #1
D4+2
T
I
----
----
----
----
D4+3
A5
O
N
L_WE[0]# L_OE[0]#
L_WE[0]# L_OE[0]#
L_WE[0]# L_OE[0]#
L_WE[0]# L_OE[0]#
Rev. 2.1- February,
Chip #0
D5
A6
EA218
D6

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