A3992 Allegro MicroSystems, Inc., A3992 Datasheet - Page 10
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A3992
Manufacturer Part Number
A3992
Description
DMOS Dual Full-Bridge Microstepping PWM Motor Driver
Manufacturer
Allegro MicroSystems, Inc.
Datasheet
1.A3992.pdf
(13 pages)
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A3992
Layout. The printed circuit board should use a heavy
groundplane. For optimum electrical and thermal
performance, the A3992 must be soldered directly
onto the board. On the underside of the A3992 pack-
age is an exposed pad, which provides a path for
enhanced thermal dissipation. The thermal pad should
be soldered directly to an exposed surface on the PCB.
Thermal vias are used to transfer heat to other layers
of the PCB.
In order to minimize the effects of ground bounce and
offset issues, it is important to have a low impedance
single-point ground, known as a star ground, located
very close to the device. By making the connection be-
tween the pad and the ground plane directly under the
A3992, that area becomes an ideal location for a star
ground point. A low impedance ground will prevent
ground bounce during high current operation and en-
sure that the supply voltage remains stable at the input
terminal. The recommended PCB layout, shown in the
diagram below, illustrates how to create a star ground
CREF
CVDD
OUT1A
VREF
CS1 RS1
OUT2A
RS2
CS2
GND
U1
OUT2B
ROSC
OUT1B
CREG
CCP
CVBB1
CVCP
VBB
CVBB2
LP package layout shown
Microstepping PWM Motor Driver
under the device, to serve both as a low impedance
ground point and thermal path.
The two input capacitors should be placed in parallel,
and as close to the device supply pins as possible. The
ceramic capacitor (CVBB1) should be closer to the
pins than the bulk capacitor (CVBB2). This is neces-
sary because the ceramic capacitor will be responsible
for delivering the high frequency current components.
The sense resistors, RSx , should have a very low
impedance path to ground, because they must carry
a large current while supporting very accurate volt-
age measurements by the current sense comparators.
Long ground traces will cause additional voltage
drops, adversely affecting the ability of the compara-
tors to accurately measure the current in the wind-
ings. As shown in the layout below, the SENSEx pins
have very short traces to the RSx resistors and very
thick, low impedance traces directly to the star ground
underneath the device.
VREF
CS1
CS2
CREF
DMOS Dual Full-Bridge
RS1
RS2
OUT1A
OUT2A
1
SENSE1
OUT1A
NC
STROBE
CLOCK
DATA
GND
REF
MUX
VDD
OUT2A
SENSE2
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A3992
PAD
CVDD
OUT1B
OUT2B
SLEEP
VREG
VBB1
VBB2
GND
OSC
VCP
CP2
CP1
NC
CCP
ROSC
CREG
OUT2B
CVCP
OUT1B
CVBB1
CVBB2
V
10
BB