STG4159 STMicroelectronics, STG4159 Datasheet

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STG4159

Manufacturer Part Number
STG4159
Description
Low voltage 0.3 Ohm max single SPDT switch with break-before-make feature and 10kV contact ESD protection
Manufacturer
STMicroelectronics
Datasheet

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STG4159BJR
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ST
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STG4159BJR
Manufacturer:
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Quantity:
12 711
Table 1.
Features
April 2007
Wide operating voltage range:
V
Low power dissipation:
I
Low "ON" resistance V
– R
– R
– R
Separate supply voltage for switch and control
pin
Latch-up performance exceeds 100mA per
JESD 78, Class II
ESD performance tested on common channel
(D pin)
– 10kV IEC-61000-4-2 ESD, contact
– 15kV IEC-61000-4-2 ESD, air discharge
ESD performance test on all other pins
– 10kV IEC-61000-4-2 ESD, contact
– 500V machine model (JESD22 A115-A)
– 1500V charged-device model
CC
CC
V
V
V
discharge
discharge
(JESD22 C101)
= 0.2µA (max.) at T
CC
CC
CC
(OPR) = 1.65V to 4.8V
ON
ON
ON
break-before-make feature and 10kV contact ESD protection
STG4159BJR
= 2.25V
= 3.0V
= 4.3V
= 0.40Ω (max. T
= 0.35Ω (max. T
= 0.30Ω (max. T
Part number
Device summary
STG4159
IN
A
A
A
A
= 85°C
= 0V:
= 25ºC) at
= 25ºC) at
= 25ºC) at
Low voltage 0.3Ω max single SPDT switch with
Flip-Chip7
Flip-Chip7
Package
Rev 3
Description
The STG4159 is a high-speed CMOS low voltage
single analog SPDT (Single Pole Dual Throw)
switch or 2:1 multiplexer/demultiplexer switch
fabricated in silicon gate C
designed to operate from 1.65V to 4.58V, making
this device ideal for portable applications. It offers
low ON-resistance (0.45Ω) at V
SEL inputs are provided to control the switches.
The switch S1 is ON (connected to common Port
D) when the SEL input is held high and OFF
(high impedance state exists between the two
ports) when SEL is held low; the switch S2 is ON
(it is connected to common Port D) when the SEL
input is held low and OFF (high impedance state
exist between the two ports) when SEL is held
high.
Additional key features are fast switching speed,
break-before-make delay time and ultra low power
consumption. All inputs and outputs are equipped
with protection circuits against static discharge,
giving them ESD immunity and transient excess
voltage.
Flip-Chip7
Tape and reel
2
Packaging
MOS technology. It is
Tube
STG4159
CC
= 4.3V. The
www.st.com
1/18
18

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STG4159 Summary of contents

Page 1

... STG4159 STG4159BJR April 2007 Low voltage 0.3Ω max single SPDT switch with Description The STG4159 is a high-speed CMOS low voltage single analog SPDT (Single Pole Dual Throw) switch or 2:1 multiplexer/demultiplexer switch fabricated in silicon gate C designed to operate from 1.65V to 4.58V, making this device ideal for portable applications. It offers low ON-resistance (0.45Ω ...

Page 2

... Contents Contents 1 Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2/18 STG4159 ...

Page 3

... STG4159 1 Logic diagram Figure 1. Functional diagram Figure 2. Input equivalent circuit Table 2. Truth table SEL High Impedance SEL Switch S1 ON (1) OFF Logic diagram Switch S2 (1) OFF ON 3/18 ...

Page 4

... Logic diagram Figure 3. Pin connection (bump side view) Table 3. Pin description Flip-Chip 4/18 Symbol Name and function S1, S2 Independent channels D Common channel SEL Control V Positive supply voltage CC V Logic supply voltage L GND Ground (0V) STG4159 ...

Page 5

... STG4159 2 Maximum rating Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied ...

Page 6

... I =100mA S 3.7 4.3 1.8 2 1.65 - 4.3 I =100mA S 3.7 4 1.65-4.3 1. 1.65-4.3 1.65 - 4.3 V =Open D V =Open S 1.65-4.3 1. STG4159 Value T = 25°C -40 to 85°C A Min. Typ. Max. Min. Max. 1.25 1.25 1.75 1.75 2.35 2.35 2.8 2.8 0.6 0.6 0.8 0.8 1.05 1.05 1.5 1.5 0.49 0.65 0.85 0.30 0.40 0.50 0.25 0.35 0.45 0.22 0.32 0.42 0.21 0.30 0. 300 400 450 130 170 230 ...

Page 7

... STG4159 Table 6. DC specifications Symbol Parameter Quiescent I CC supply current SEL leakage I SEL current 1. ∆ ON(Max) ON(Min) 2. Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges. Table 7. AC electrical characteristics (C Symbol ...

Page 8

... 600Hz to 20kHz R = 50Ω 1.65-4.3 4.3 L 1.8-4 1.8-4 1.8-4 1.8-4 1.8-4 1.8-4 (VD/VS output input to off switch 50Ω 25° Value T = 25°C -40 to 85°C A Min. Typ. Max. Min. Max. -69 -69 0. 227 STG4159 Unit MHz pF ...

Page 9

... STG4159 4 Test circuits Figure 4. ON-Resistance Figure 6. OFF Leakage Figure 8. OFF Isolation Figure 5. Bandwidth Figure 7. Channel to channel crosstalk Test circuits 9/18 ...

Page 10

... Test circuits Figure 9. Test circuit Note 5/35pF or equivalent: (includes jig capacitance 50Ω or equivalent pulse generator (typically 50Ω) T OUT Figure 10. Break-before-make time delay 10/18 STG4159 ...

Page 11

... STG4159 Figure 11. Switching time and charge injection (V = 0V, R GEN GEN Figure 12. Turn ON, turn OFF delay time = 0Ω 1MΩ 100pF Test circuits 11/18 ...

Page 12

... These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK trademark. ECOPACK specifications are available at: www.st.com. 12/18 STG4159 ® packages. ...

Page 13

... STG4159 Table 9. Flip-Chip7 mechanical data Dim. Min A 0.585 A1 0. 0.265 D 1.018 D1 E 2.018 E1 e 0.45 f ccc Note: 1 The terminal Pin 1 on the bumps side is identified by a distinguishing feature (for instance by a circular "clear area" - typically 0.1mm diameter - ) The terminal Pin 1 on the backside of the product is identified by a distinguishing feature (for instance by a circular " ...

Page 14

... Package mechanical data Figure 14. Foot print recommendations Figure 15. Marking Dot, ST Logo S1 = Marking V = Manufacturing Location yww = Datecode (y = year week) Figure 16. Flip-Chip7 tape specification 14/18 STG4159 ...

Page 15

... STG4159 Figure 17. Flip-Chip7 reel information Package mechanical data 15/18 ...

Page 16

... Package mechanical data Figure 18. Flip-Chip7 reel information 16/18 STG4159 ...

Page 17

... STG4159 6 Revision history Table 10. Revision history Date Revision 05-May-2006 22-Nov-2006 17-Apr-2007 1 First release 2 Schematic Figure 1 on page 3 3 Typo in cover page description Revision history Changes updated 17/18 ...

Page 18

... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 18/18 Please Read Carefully: © 2007 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com STG4159 ...

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