STE2004SDIE2 STMicroelectronics, STE2004SDIE2 Datasheet - Page 9
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STE2004SDIE2
Manufacturer Part Number
STE2004SDIE2
Description
102 x 65 single-chip LCD controller/driver
Manufacturer
STMicroelectronics
Datasheet
1.STE2004SDIE2.pdf
(79 pages)
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STE2004S
3
3.1
3.2
3.3
3.4
Circuit description
Supplies voltages and grounds
V
generator is not used, this should be connected to V
IC. V
Internal supply voltage generator
The IC has a fully integrated (no external capacitors required) charge pump for the liquid
crystal display (LCD) supply voltage generation. The multiplying factor can be programmed
to be: Auto, X5, X4, X3, X2, using the ’set CP multiplication’ command. If auto is set, the
multiplying factor is automatically selected to have the lowest current consumption in every
condition, allowing an input voltage that changes over time and a constant V
The output voltage (V
eight different temperature coefficients (TC, rate of change with temperature) can be
programmed using the bits TC1, TC0, T2, T1, T0, to ensure there is no contrast degradation
over the LCD operating range.
An external supply could be connected to V
generator. In such event the internal voltage generator must be programmed to zero (PRS =
[0;0], Vop = 0 - reset condition) and the charge pump (CP[0;0]) set to 5x or quto mode.
Oscillator
A fully integrated oscillator (requires no external components) is present to provide the clock
for the display system. When used the OSC pad must be connected to V
external oscillator could be used and fed into the OSC pin. If an external oscillator is used, it
must be always present when STE2004S is not in power down mode. An oscillator out is
provided on the OSCOUT Pad to cascade two or more drivers.
Master/slave mode
STE2004S supports the master slave working mode for both control logic and charge pump.
This function allows to drive matrix such as 204x65 or 102x130 using two synchronized
STE2004S and the internal charge pump of both devices.
If M/S is connected to VDD1, the driver is configured to work in master mode. When
STE2004S is in master mode, the Vsense_Slave pin is disabled and the VLCD value can be
controlled using Vop bits. The master time generator outputs the relevant timing references
on FR_OUT and OSC_OUT.
If M/S is connected to GND, the driver is configured to work in slave mode. When
STE2004S is in slave mode, the VLCD configuration set by Vop registers and the thermal
compensation slope set by TC register, are neglected. The VLCD value generated is equal
to the voltage value present on the Vsense_Slave pin so the slave configuration can follow
DD2
V
DD1
DD2
supplies voltages to the internal voltage generator (see below). If the internal voltage
supply voltage could be different form V
≥
2
-------------------------- -
⋅
(
n
VLCD
+
4
)
LCD
+
200mV
) is tightly controlled through the V
LCD
to supply the LCD without using the internal
DD2
DD1
.
pad. V
LCDSENSE
DD1
supplies the rest of the
pad. For this voltage,
Circuit description
DD1
LCD
pad. An
voltage.
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