FA5550 Fuji Electric holdings CO.,Ltd, FA5550 Datasheet - Page 9

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FA5550

Manufacturer Part Number
FA5550
Description
Power Factor Correction Converter
Manufacturer
Fuji Electric holdings CO.,Ltd
Datasheet
9. Basic operational description
(1) Switching operation
Figure 2 shows the outline of waveforms of the switching
operation in each part under the steady-state condition.
The operations are performed as follows.
A trigger signal of switching frequency output from the
oscillator is inputted to R-S F.F. as a set signal. Then, the
OUT pin voltage changes to high state, and Q1 turns on (t1).
When Q1 is turned on, the current through L1 is increased.
The current value from Q1 is converted to voltage with Rs,
and the voltage is input to IS pin (V
reference value of the current comparator (CUR.comp)
specified by output of a multiplier (MUL), a reset signal is
input into R-S F.F. to turn off Q1 (t2). The shift to a next
switching cycle (t1) is made by a setting signal output from
the internal oscillator (f=65kHz(typ))
(2) Power factor improvement operation
COMP pin voltage that is output of the error amplifier
(ERRAMP) is smoothed approximately to a DC voltage with
C3 under steady-state condition. This voltage is inputted into
the multiplier. A waveform, which is made by rectification of
the AC input voltage, is input to the other input of the
multiplier.
As the result, the multiplier outputs a near-sinusoidal
waveform that is product of these two waves proportioning to
the AC input voltage.
This output near-sinusoidal voltage waveform is input into the
current comparator (CUR.comp) as the reference of an
inductance current.
As the result, homogenized current value through the
inductance forms a sinusoidal wave. By eliminating and
equaling switching ripples in the current through this inductor
L1 using C1, the current output from an AC input voltage
forms a near sinusoidal wave. Thus, the power factor can be
improved.
Rev.1 Feb-2008
V
These ICs are used to control the power factor correction
converter using boosting chopper, adopting peak value
control in operations. The outline of those operations is
described here using a rough schematic diagram of the
circuit shown in Fig. 1.
AC
(Sin Wave)
Fig.3 Images of operating waveforms in each part
t
MUL
C1
3
L1
I
MUL
V
(Sin Wave)
IS
t
2
4
V
COMP
C3
(Approximately DC)
t
V
CUR.comp
IS
t
). When V
ERRAMP
t
FB
IS
Q1
FA5550 / 51
Rs
1
reaches the
D1
9
IL1
Iin
Fig.4 Operational waveform after improving Power Factor
AC
CUR.comp
(Q1gate)
Output
(reset)
output
OSC
(set)
OUT
Vds
Fig.2 Switching operation; waveforms of each part
MUL
IL1
Q1
3
Fig.1 Overview of operating circuit block
MUL
Fuji Electric Device Technology
t1
IS
SLOPE
2
4
C1
COMP
C3
ERRAMP
(Overview)
CUR.comp
OSC
t2
Eliminate current ripples associated
C1でスイッチングに伴う
with switching by using C1
L1
リップル電流を除去
Iin(peak)
R
S
Q1
F.F.
Rs
Q
t1
D1
C2
7
FB
OUT
1
t2
Vo

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