MCK12140 ON Semiconductor, MCK12140 Datasheet - Page 3

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MCK12140

Manufacturer Part Number
MCK12140
Description
Phase-frequency Detector
Manufacturer
ON Semiconductor
Datasheet

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comparator in an analog phase-locked loop. The device
determines the “lead” or “lag” phase relationship and time
difference between the leading edges of a VCO (V) signal
and a Reference (R) input. Since these edges occur only once
per cycle, the detector has a range of 2p radians.
plots of Figure 2. Figure 2 plots the average value of U, D
and the difference between U and D versus the phase
difference between the V and R inputs.
lags or leads V and the frequency of R is less than or greater
than the frequency of V. Under these four conditions the
12140 will function as follows:
Figure 2. Average Output Voltage vs. Phase Difference
DC CHARACTERISTICS
AC CHARACTERISTICS
Power Supply Current H
Power Supply Voltage H
Input HIGH Current
Maximum Toggle Frequen-
cy
Propagation Delay
to Output
Output Rise/Fall Times
Fv > Fr
The 12140 is a high speed digital circuit used as a phase
The operation of the 12140 can best be described using the
There are four potential relationships between V and R: R
−2p
−2p
−2p
Characteristic
Characteristic
R lags V
Q (20 to 80%)
−p
−p
−p
R to D
R to U
V to D
V to U
K
K
U−D
U
D
Symbol
(V
(V
R leads V
V
Symbol
I
EE
I
EE
EE
IH
EE
F
t
t
PLH
PHL
MAX
= V
t
t
= V
r
f
p
p
p
EE
EE
−4.75
−4.20
(min) − V
(min) − V
Min
Min
Fv < Fr
2p
2p
2p
−40 C
APPLICATIONS INFORMATION
−40 C
−5.2
−4.5
Typ
45
45
EE
EE
Typ
800
440
330
330
440
225
MCH12140, MCK12140
(max); V
(max); V
V
V
V
V
OH
OH
OH
OL
Max
−5.5
−5.5
150
V
Max
V
http://onsemi.com
2
OH
2
− V
2
− V
− V
2
− V
OH
CC
CC
OH
OL
OL
OL
−4.75
−4.20
Min
= GND, unless otherwise noted.)
= GND, unless otherwise noted.)
38
38
Min
650
320
210
210
320
100
3
0 C
−5.2
−4.5
Typ
R lags V in phase
phase of R lags that of V the U output will stay HIGH while
the D output will pulse from HIGH to LOW. The magnitude
of the pulse will be proportional to the phase difference
between the V and R inputs reaching a minimum 50% duty
cycle under a 180 out of phase condition. The signal on D
indicates to the VCO to decrease in frequency to bring the
loop into lock.
V frequency > R frequency
12140 behaves in a similar fashion as above. Again the
signal on D indicates that the VCO frequency must be
decreased to bring the loop into lock.
R leads V in phase
phase of R leads that of V the D output will stay HIGH while
the U output pulses from HIGH to LOW. The magnitude of
the pulse will be proportional to the phase difference
between the V and R inputs reaching a minimum 50% duty
cycle under a 180 out of phase condition. The signal on U
indicates to the VCO to increase in frequency to bring the
loop into lock.
V frequency < R frequency
behaves in a similar fashion as above. Again the signal on U
indicates that the VCO frequency must be decreased to bring
the loop into lock.
in phase the value of U − D is zero thus providing a zero error
voltage to the VCO. This situation indicates the loop is in lock
and the 12140 action will maintain the loop in its locked state.
0 C
Typ
800
440
330
330
440
225
45
45
When the R and V inputs are equal in frequency and the
When the frequency of V is greater than that of R the
When the R and V inputs are equal in frequency and the
When the frequency of V is less than that of R the 12140
From Figure 2 when V and R are at the same frequency and
Max
−5.5
−5.5
150
52
52
Max
580
470
470
580
350
−4.75
−4.20
Min
38
38
Min
650
320
210
210
320
100
25 C
−5.2
−4.5
25 C
Typ
Typ
800
440
330
330
440
225
45
45
Max
−5.5
−5.5
150
52
52
Max
580
470
470
580
350
−4.75
−4.20
Min
38
42
Min
650
360
240
240
360
100
70 C
−5.2
−4.5
70 C
Typ
Typ
800
480
360
360
480
225
45
50
Max
−5.5
−5.5
150
52
58
Max
620
500
500
620
350
Unit
mA
Unit
mA
V
ps
ps

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