IDT72T72115 Integrated Device Technology, IDT72T72115 Datasheet - Page 17

• Manufacturer Part Number: IDT72T72115
• Description: 128k X 72 Terasync Fifo, 2.5v - Best Value!
• Manufacturer: Integrated Device Technology

NOTES:
1. The programming method can only be selected at Master Reset.
2. Parallel reading of the offset registers is always permitted regardless of which programming method has been selected.
3. The programming sequence applies to both IDT Standard and FWFT modes.
IDT72T7285/72T7295/72T72105/72T72115 2.5V TeraSync™ ™ ™ ™ ™ 72-BIT FIFO
16,384 x 72, 32,768 x 72, 65,536 x 72, 131,072 x 72
LD
0
0
0
X
1
1
1
WEN
1
1
0
X
1
0
1
REN
Figure 3. Programmable Flag Offset Programming Sequence
0
1
1
1
X
0
1
SEN
1
1
0
1
X
X
X
WCLK
X
X
X
X
X
RCLK
17
X
X
X
X
X
SCLK
X
X
X
X
X
X
Serial shift into registers:
1 bit for each rising SCLK edge
Parallel read from registers:
Empty Offset (LSB)
Empty Offset (MSB)
Full Offset (LSB)
Full Offset (MSB)
Starting with Empty Offset (LSB)
Ending with Full Offset (MSB)
Parallel write to registers:
Empty Offset (LSB)
Empty Offset (MSB)
Full Offset (LSB)
Full Offset (MSB)
28 bits for the IDT72T7285
30 bits for the IDT72T7295
32 bits for the IDT72T72105
34 bits for the IDT72T72115
IDT72T7285
IDT72T7295
IDT72T72105
IDT72T72115
Read Memory
No Operation
Write Memory
No Operation
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
5994 drw06