HV9120 Supertex, Inc., HV9120 Datasheet - Page 6

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HV9120

Manufacturer Part Number
HV9120
Description
High-voltage Current-mode Pwm Controller
Manufacturer
Supertex, Inc.
Datasheet

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Test Circuits
Detailed Description
Preregulator
The preregulator/startup circuit for the HV912x consists of a high-
voltage n-channel depletion-mode DMOS transistor driven by an
error amplifier to form a variable current path between the V
terminal and the V
occurs when V
shuts off altogether when V
and 9.4V, so that if V
(generally the supply the chip is controlling) no current other than
leakage is drawn through the high voltage transistor. This mini-
mizes dissipation.
An external capacitor between V
to store energy used by the chip in the time between shutoff of the
high voltage path and the V
take over powering the chip. This capacitor should have a value
of 100X or more the effective gate capacitance of the MOSFET
being driven, i.e.,
C
as well as very good high frequency characteristics. Stacked
polyester or ceramic caps work well. Electrolytic capacitors are
generally not suitable.
A common resistor divider string is used to monitor V
the undervoltage lockout circuit and the shutoff circuit of the high
voltage FET. Setting the undervoltage sense point about 0.6V
lower on the string than the FET shutoff point guarantees that the
undervoltage lockout always releases before the FET shuts off.
Bias Circuit
An external bias resistor, connected between the bias pin and V
is required by the HV912x to set currents in a series of current
mirrors used by the analog sections of the chip. Nominal external
bias current requirement is 15 to 20µA, which can be set by a
390KΩ to 510KΩ resistor if a 10V V
680KΩ resistor if V
required; ± 5% is fine.
Clock Oscillator
The clock oscillator of the HV912x consists of a ring of CMOS
inverters, timing capacitors, a capacitor discharge FET, and, in
(V
+10V
storage
NOTE: Set Feedback Voltage so that
(–V
GND
DD
(FB)
IN
)
)
≥ 100 x (gate charge of FET at 10V
V
COMP
Reference
DD
= 0, with current reducing as V
= V
DD
0.1µF
DD
DD
DIVIDE
terminal. Maximum current (about 20 mA)
is held at 10 or 12V by an external source
will be 12V. A precision resistor is not
Error Amp Z
+
± 1mV before connecting transformer
DD
DD
rises to somewhere between 7.8
supply’s output rising enough to
DD
1.0V swept 100Hz – 2.2MHz
and V
V
DD
1
OUT
is used, or a 510kΩ to
SS
secondary)
Tektronix
is generally required
P6021
(1 turn
÷
10V)
DD
rises. This path
DD
V
2
for both
60.4K
40.2K
SS
IN
6
the 50% maximum duty cycle versions, a frequency dividing flip-
flop. A single external resistor between the OSC In and OSC Out
pins is required to set oscillator frequency (see graph). For the
50% maximum duty cycle versions the Discharge pin is internally
connected to V
Discharge can either be connected to V
V
One difference exists between the Supertex HV912x and competi-
tive 912x’s: The oscillator is shut off when a shutoff command is
received. This saves about 150µA of quiescent current, which
aids in the construction of power supplies to meet CCITT speci-
fication I-430, and in other situations where an absolute minimum
of quiescent power dissipation is required.
Reference
The Reference of the HV912x consists of a stable bandgap
reference followed by a buffer amplifier which scales the voltage
up to approximately 4.0V. The scaling resistors of the reference
buffer amplifier are trimmed during manufacture so that the output
of the error amplifier when connected in a gain of –1 configuration
is as close to 4.000V as possible. This nulls out any input offset
of the error amplifier. As a consequence, even though the ob-
served reference voltage of a specific part may not be exactly
4.0V, the feedback voltage required for proper regulation will be.
A ≈50KΩ resistor is placed internally between the output of the
reference buffer amplifier and the circuitry it feeds (reference
output pin and non-inverting input to the error amplifier). This
allows overriding the internal reference with a low-impedance
voltage source ≤6.0V. Using an external reference reinstates the
input offset voltage of the error amplifier, and its effect of the exact
value of feedback voltage required. In general, because the
reference voltage of the Supertex HV912x is not noisy, as some
previous examples have been, overriding the reference should
seldom be necessary.
Because the reference of the 912x is a high impedance node, and
usually there will be significant electrical noise near it, a bypass
capacitor between the reference pin and V
mended. The reference buffer amplifier is intentionally compen-
sated to be stable with a capacitive load of 0.01 to 0.1µF.
SS
through a resistor used to set a deadtime.
0.1V swept 10Hz – 1MHz
10.0V
SS
4.00V
(ground). For the 99% duty cycle version,
Reference
100K1%
0.1µF
PSRR
+
SS
100K1%
directly or connected to
SS
V
is strongly recom-
HV9120/HV9123
2
V
1

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