HV9930 Supertex, Inc., HV9930 Datasheet - Page 5

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HV9930

Manufacturer Part Number
HV9930
Description
Hysteretic Boost-buck ?uk Led Driver Ic
Manufacturer
Supertex, Inc.
Datasheet
Functional Description
mal operation, the input current will be less than the pro-
grammed current and hence, the output of the input side
comparator will be HIGH. The output of the AND gate will
then be dictated by the output current controller.
The output side hysteretic comparator will be in operation
during the steady state operation of the circuit. This com-
parator turns the MOSFET on and off based on the LED
current.
The use of these comparators in a boost-buck topology is
a patent-pending technique, which eliminates the need for
compensation components.
PWM Dimming
PWM dimming can be achieved by applying a signal at the
PWM pin. When the PWMD pin is pulled high, the GATE
driver is enabled and the circuit operates normally. When
the PWMD pin is left open or connected to GND, the GATE
driver is disabled and the external MOSFET turns off. The IC
Application Information
Over-voltage Protection
Over-voltage protection can be added by splitting the output
side resistor R
diode D3. When there is an open LED condition, the diode
D3 will clamp the output voltage and the zener diode current
will be regulated by the sum of R
Damping Circuit
The Ćuk converter is inherently unstable when the output
current is being controlled. An uncontrolled input current will
lead to an un-damped oscillation between L1 and C1 caus-
ing excessively high voltages across C1. To prevent these
oscillations, a damping circuit consisting of Rd and Cd is ap-
plied across the capacitor C1. This damping circuit will help
to stabilize the circuit and help in the proper operation of the
HV9930 based Ćuk converter.
Design and Operation of the Boost-Buck Con-
verter
For details on the design for a Boost-Buck converter using
the HV9930 and the calculation of the damping components,
please refer to Application Notes AN-H51 and AN-H58.
Design Example
The choice of the resistor dividers to set the input and output
current levels is illustrated by means of the design example
given below.
s2
into two components, and adding a zener
s2a
(cont.)
and R
cs2
.
5
is designed so that the signal at the PWMD pin inhibits the
driver only and the IC need not go through the entire start-
up cycle each time ensuring a quick response time for the
output current.
The fl ying capacitor in the Ćuk converter (C1) is initially
charged to the input voltage VDC (through diodes D1 and
D2). When the circuit is turned on and reaches steady state,
the voltage across C1 will be V
diode D2, when the circuit is turned off, capacitor C1 will
discharge through the LEDs and the input voltage source
VDC. Thus, during PWM dimming, if capacitor C1 has to be
charged and discharged each cycle, the transient response
of the circuit will be limited. By adding diode D2, the volt-
age across capacitor C1 is held at V
circuit is turned off enabling the circuit to return quickly to its
steady state (and bypassing the start-up stage) upon being
enabled.
The parameters of the power circuit are:
V
V
V
I
f
Using these parameters, the values of the power stage in-
ductors and capacitor can be computed as (see Application
Note AN-H51 for details):
L1 = 82µH
L2 = 150µH
C1 = 0.22µF
The input and output currents for this design are:
I
ΔI
I
ΔI
Output Current Limits
The current sense resistor (R
resistors (R
The current sense resistor (R
resistors (R
O
S,MIN
IN,MAX
O
IN,MIN
IN,MAX
O
IN
O
= 0.35A
= 350mA
= 28V
= 87.5mA
= 0.21A
= 300kHz
= 1.6A
= 9.0V
= 16V
S2
S1
& R
& R
REF2
REF1
), determines the output current limits.
), determines the input current limits.
CS2
CS1
DC
), combined with the other
), combined with the other
+ V
DC
O
+ V
. In the absence of
O
HV9930
even when the

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