MCP6S92 Microchip Technology Inc., MCP6S92 Datasheet - Page 9

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MCP6S92

Manufacturer Part Number
MCP6S92
Description
Single-ended, Rail-to-rail I/o, Low-gain Pga
Manufacturer
Microchip Technology Inc.
Datasheet

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FIGURE 1-6:
the standard condition V
1.1.3
Figure 1-7 shows the Integral Non-Linearity (INL) of the
output voltage.
EQUATION 1-5:
The output non-linearity specification in the Electrical
Specifications (with units of: % of FSR) is related to
Figure 1-7 by:
EQUATION 1-6:
The Full-Scale Range (FSR) is V
(0.3V to V
FIGURE 1-7:
standard condition V
 2004 Microchip Technology Inc.
V
DD
INL (V)
0
– 0.3
V
0.3
0
DD
0
V
DD
OUT
0
0.3
G
OUTPUT NON-LINEARITY
V
– 0.3V).
0.3
ONL
(V)
G
INL
=
=
max V
------------------------------ - 100%
V
Output Voltage Model with
Output Voltage INL with the
REF
V
DD
OUT
V
REF
V
= V
DD
3
0.6V
4
V
V
G
DD
V
SS
– 0.3 V
= V
4
O_LIN
DD
G
– 0.3 V
= 0 V.
SS
– 0.6V
V
G
3
DD
= 0V.
G
DD
V
V
V
IN
V
2
1
(V)
IN
(V)
1.1.4
Some of the plots in Section 2.0 “Typical Performance
Curves”, have the conditions V
V
modified for these conditions. The ideal V
becomes:
EQUATION 1-7:
The complete linear model is:
EQUATION 1-8:
where the new V
EQUATION 1-9:
The equations for extracting the specifications do not
change.
REF
V
ON_LIN
= V
DD
V
V
IN_H
. The equations and figures above are easily
DIFFERENT V
O_ID
=
V
IN_L
G 1
V
=
DD
IN
=
V
V
---------------------------------------------- -
end points are:
+
=
REF
MCP6S91/2/3
V
DD
g
REF
V
0.3V V
----------------------------- -
E
REF
=
0.3V
V
+
V
G
IN
G
G V
SS
REF
V
REF
SS
=
V
IN
V
IN_L
CONDITIONS
=
REF
0V
+
0V
V
V
+
REF
+
REF
DS21908A-page 9
REF
V
V
OS
REF
OUT
= V
+
DD
0.3V
equation
/2 or

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