ATA5811 ATMEL Corporation, ATA5811 Datasheet - Page 83

• Manufacturer Part Number: ATA5811
• Description: Ata5811 Uhf Ask/fsk Transceiver
• Manufacturer: ATMEL Corporation

18. Digital Timing Characteristics
All parameters refer to GND and are valid for T
6.6V (2-battery application) and V
otherwise specified.
4689F–RKE–08/06
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
12.1
12.2
13.1
13.2
13.3
13.4
No.
12
13
Parameters
Basic Clock Cycle of the Digital Circuitry
Basic clock cycle
Extended basic clock
cycle
RX Mode/RX Polling Mode
Sleep time
Start-up PLL RX mode from Idle mode
Start-up signal
processing
Time for Bit-check
VS2
Test Conditions
XLIM = 0
BR_Range_0
BR_Range_1
BR_Range_2
BR_Range_3
XLIM = 1
BR_Range_0
BR_Range_1
BR_Range_2
BR_Range_3
Sleep and XSleep are
defined in control
register 4
BR_Range_0
BR_Range_1
BR_Range_2
BR_Range_3
Average time during
polling. No RF signal
applied.
f
Signal data rate
Manchester
(Lim_min and Lim_max
up to ±50% of t
see
Figure 11-4 on page
53)
Bit-check time for a
valid input signal f
N
N
N
N
Signal
Bit-check
Bit-check
Bit-check
Bit-check
= 4.75V to 5.25V (car application), typical values at V
= 1/(2
= 0
= 3
= 6
= 9
amb
t
ee
ee
= –40°C to +105°C. V
)
,
Sig
Pin
T
Startup_Sig_Proc
T
VS1
T
Symbol
Startup_PLL
T
T
T
Bit_check
XDCLK
DCLK
Sleep
= V
S2
= 2.4V to 3.6V (1-battery application), V
Sleep
X
1024
16/f
T
3/f
6/f
9/f
Min.
Sleep
882
498
306
210
T
T
T
DCLK
16
8
4
2
1
8
4
2
DCLK
DCLK
DCLK
Sig
Sig
Sig
XTO
VS1
= V
798.5
1/f
ATA5811/ATA5812
T
Typ.
VS2
DCLK
Signal
= 3V and T
Sleep
798.5
X
1024
16/f
3.5/f
6.5/f
9.5/f
T
T
Max.
Sleep
882
498
306
210
T
T
T
DCLK
DCLK
16
8
4
2
1
8
4
2
DCLK
DCLK
DCLK
XTO
Sig
Sig
Sig
amb
= 25°C unless
Unit
ms
ms
µs
µs
µs
VS2
= 4.4V to
Type*
A
A
A
A
A
C
83