TYPE TOREX SEMICONDUCTOR LTD., TYPE Datasheet - Page 14

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TYPE

Manufacturer Part Number
TYPE
Description
Xc6402 High Speed, Large Current Ldo Regulators With Voltage Detector Function
Manufacturer
TOREX SEMICONDUCTOR LTD.
Datasheet

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■OPERATIONAL EXPLANATION
<Output Voltage Regulator Control>
The voltage, divided by resistors R1 & R2 which are connected to the V
voltage by the error amplifier. The P-channel MOSFET, which is connected to the V
subsequent output signal. The output voltage at the V
limit circuit and short circuit protection operate in relation to the level of output current. Further, the voltage regulator's
internal circuitry can be shutdown via the EN pin's signal.
<Detector Function with the XC6402 Series>
The series' detector function monitors the voltage divided by resistors R3 & R4 which are connected to the V
V
The V
A 'High' or 'Low' signal level can be output from the V
The VD output logic has options (please refer to the Selection Guide, item 3). As V
output, a pull-up resistor of about 220kΩ is needed to achieve a voltage output. Because of hysteresis at the detector
function, output at the V
detect voltage).
For the XC6402C type, in stand-by, if a voltage of the recovery voltage is present at the V
source), the V
Cdelay pin to a capacitor (Cd), the XC6402F series can apply a delay time to V
delay time can be calculated from the internal resistance, Rdelay (2MΩ TYP. fixed) and the value of Cd as per the following
equation.
<Current Limiter, Short-Circuit Protection>
The XC6402 series regulator offers a combination of current limit and circuit protection by means of a built-in fixed current limiter
circuit and a foldback circuit. When the load current reaches the current limit level, the fixed current limiter circuit operates and
output voltage drops. As a result of this drop in output voltage, the foldback circuit operates, the output voltage drops further and
output current decreases. When the output pin is shorted, a current of about 30mA flows.
<Low ESR Capacitors>
With the XC6402 series regulator, a stable output voltage is achievable even if low ESR capacitors are used, as a phase
compensation circuit is built-in to the regulator. In order to ensure the effectiveness of the phase compensation, we suggest
that an output capacitor (CL) be connected as close as possible, between the output pin (V
an output capacitor (CL) with a capacitance, based on the chart below. We also suggest an input capacitor (C
this should be connected between V
IN
XC6402
pin, as well as monitoring the voltage of the internal reference voltage source via the comparator.
DSEN
pin has options (please refer to the Selection Guide, item 2).
DOUT
Delay Time
Output Capacitor Corresponding Chart
VR OUTPUT VOLTAGE
pin will be high impedance mode, and the pull up voltage will be output at V
0.022μF
0.047μF
0.01μF
0.22μF
0.47μF
Cdelay
0.1μF
Series
1μF
DOUT
pin will invert when the detect voltage level increases above the release voltage (105% of the
CL
IN
Rdelay standard : 1.0 ~ 3.5MΩ
and V
Delay Time = Cdelay x Rdelay x 0.7
DELAY TIME (TYP.)
SS
in order to stabilize input power source.
1400 ms
30.8 ms
65.8 ms
140 ms
308 ms
658 ms
14 ms
0.8 ~1.45V
DOUT
ROUT
6.8μF
pin when the VD pin voltage level goes below the detect voltage.
pin is controlled & stabilized by negative feedback. The current
1.5 ~ 1.75V
ROUT
2.2μF
TYP : 2.0MΩ
pin is compared with the internal reference
DOUT
329.0 ~ 1151.5 ms
700.0 ~ 2450.0 ms
32.9 ~ 115.15 ms
154.0 ~ 539.0 ms
70.0 ~ 245.0 ms
15.4 ~ 53.9 ms
7.0 ~ 24.5 ms
DELAY TIME
DOUT
voltage when releasing voltage. The
ROUT
ROUT
is an open-drain N-channel
1.8V ~ 5.0V
ROUT
) and the V
1.0μF
pin, is then driven by the
DOUT
pin (from another power
. By connecting the
SS
ROUT
pin. Please use
IN
) of 1μF :
pin or the

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