EVB7122 Melexis Company, EVB7122 Datasheet - Page 10

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EVB7122

Manufacturer Part Number
EVB7122
Description
Evaluation Board For Th7122 And Th71221
Manufacturer
Melexis Company
Datasheet
3.1.3
39012 07122 02
Rev. 006
LNAHYST
not used
DELPLL
ROMAX
PKDET
ROMIN
Name
OA2
AFC
RT
B – word
[12:10]
[15:13]
[9:0]
Bits
[16]
[17]
[18]
[19]
[20]
[21]
000
001
010
011
100
101
110
111
000
001
010
011
100
101
110
111
4d .. 1023d
0
1
0
1
0
1
0
1
0
1
disabled
enabled
OA2 can be enabled in FSK receive mode. OA2 is disabled in ASK mode receive.
disabled
enabled
disabled
undelayed start
starts after 8 valid RO-cycles
PLL starts after 8 valid RO-cycles before entering an active mode to ensure reliable oscillation
of the reference oscillator.
disabled
The RSSI output signal directly feeds the data slicer setup by means of OA1.
enabled
In ASK receive mode the RSSI Peak Detector output is multiplexed to pin INT2/PDO.
enabled - typical 340 mV (V
150 μA
225 μA
300 μA
375 μA
450 μA
525 μA
150 μA
225 μA
300 μA
375 μA
450 μA
525 μA #default
75 μA
75 μA
Set the desired steady state current of the reference oscillator
0 μA
0 μA
Set the start-up current of the reference oscillator
Page 10 of 24
#default
Reference divider ratio in TX operation mode
Hysteresis on pin GAIN_LNA
set to ‘1’ for correct function
The control circuitry regulates the current of the oscillator core
between the values ROMAX and ROMIN. As the regulation input
signal the amplitude on pin RO is used. If the ROMIN value is
sufficient to achieve an amplitude of about 400mV on pin RO the
current of the reference oscillator core will be set to ROMIN.
Otherwise the current will be permanently regulated between
ROMAX and ROMIN. If ROMIN and ROMAX are equal no
regulation of the oscillator current occurs. Please also note the
block description of the reference oscillator in para. 3.1.1
Set the start-up current of the reference oscillator core. Please
also note the description of the ROMIN register and the block
description of the reference oscillator which can be seen above.
Delayed start of the PLL
PLL starts at the reference oscillator start-up
Internal AFC feature
RSSI Peak Detector
OA2 operation
Description
0→1
Evaluation Board Description
= 1.56V, V
27 to 930MHz Transceiver
1→0
= 1.22V)
EVB7122
EVB Description
#default
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June/08

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