MC74VHCT50AMG ON Semiconductor, MC74VHCT50AMG Datasheet - Page 2

IC BUFF/LVL SHFTR N-INV 14SOEIAJ

MC74VHCT50AMG

Manufacturer Part Number
MC74VHCT50AMG
Description
IC BUFF/LVL SHFTR N-INV 14SOEIAJ
Manufacturer
ON Semiconductor
Series
74VHCTr
Datasheet

Specifications of MC74VHCT50AMG

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
6
Number Of Bits Per Element
1
Current - Output High, Low
8mA, 8mA
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
14-SOIC (5.3mm Width), 14-SOP, 14-SOIJ
Logic Family
VHCT
Number Of Channels Per Chip
5
Polarity
Non-Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 8 mA
Low Level Output Current
8 mA
Maximum Power Dissipation
500 mW
Minimum Operating Temperature
- 55 C
Number Of Lines (input / Output)
6 / 3
Propagation Delay Time
11.4 ns at 3.3 V, 8.5 ns at 5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. I
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
5. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
MAXIMUM RATINGS
V
V
V
I
I
I
I
I
T
T
T
q
P
V
I
Symbol
IK
OK
O
CC
GND
Latch−Up
DC Supply Voltage
DC Input Voltage
DC Output Voltage
Operating Temperature Range
Input Rise and Fall Time
JA
STG
L
J
CC
IN
OUT
D
ESD
O
absolute maximum rating must be observed.
Y
A
Figure 1. Switching Waveforms
DC Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Source/Sink Current
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature Range
Lead Temperature, 1 mm from Case for 10 Seconds
Junction Temperature under Bias
Thermal Resistance
Power Dissipation in Still Air
ESD Withstand Voltage
Latch−Up Performance
50%
Characteristics
t
50% V
PLH
V
High or Low State
V
V
CC
CC
CC
CC
= 0
= 3.3 V ± 0.3 V
= 5.0 V ± 0.5 V
t
PHL
Parameter
Above V
3.0V
GND
V
V
OH
OL
http://onsemi.com
MC74VHCT50A
Output in HIGH or LOW State (Note 1)
CC
and Below GND at 85_C (Note 5)
Charged Device Model (Note 4)
Human Body Model (Note 2)
2
Machine Model (Note 3)
Symbol
V
t
V
r
V
T
OUT
CC
, t
IN
A
f
TSSOP
TSSOP
*Includes all probe and jig capacitance
SOIC
SOIC
Min
−55
2.0
0.0
0.0
0.0
0
0
DEVICE
UNDER
Figure 2. Test Circuit
TEST
*0.5 v V
*0.5 v V
*0.5 to )7.0
*65 to )150
> 2000
Value
)150
$300
> 200
OUTPUT
2000
*20
$20
$25
$50
$50
260
125
170
500
450
+125
Max
V
100
5.5
5.5
5.5
O
20
I
CC
v )7.0
v )7.0
TEST POINT
C
L
*
ns/V
Unit
°C
V
V
V
_C/W
Unit
mW
mA
mA
mA
mA
mA
mA
_C
_C
_C
V
V
V
V

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