WM8746 Wolfson Microelectronics plc, WM8746 Datasheet - Page 15
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WM8746
Manufacturer Part Number
WM8746
Description
24-bit, 192khz 6-channel Dac With Volume Control
Manufacturer
Wolfson Microelectronics plc
Datasheet
1.WM8746.pdf
(32 pages)
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WM8746
SOFTWARE CONTROL MODES
w
DIGITAL AUDIO INTERFACE CONTROL REGISTERS
Interface format is selected via the FMT[1:0] register bits:
In left justified, right justified or I
bit is set high, the expected polarity of LRCIN will be the opposite of that shown Figure 4, Figure 5
and Figure 6. Note that if this feature is used as a means of swapping the left and right channels, a 1
sample phase difference will be introduced.
In DSP modes, the LRCIN register bit is used to select between early and late modes:
By default, LRCIN and DIN0/1/2 are sampled on the rising edge of BCKIN and should ideally change
on the falling edge. Data sources which change LRCIN and DIN0/1/2 on the rising edge of BCKIN
can be supported by setting the BCP register bit. Setting BCP to 1 inverts the polarity of BCKIN to
the inverse of that shown in Figure 4, Figure 5, Figure 6, Figure 7 and Figure 8.
The IWL[1:0] bits are used to control the input word length.
Note: If 32-bit mode is selected in right justified mode, the WM8746 defaults to 24 bits.
In all modes, the data is signed 2's complement. The digital filters always input 24-bit data. If the
DAC is programmed to receive 16 or 20 bit data, the WM8746 pads the unused LSBs with zeros. If
the DAC is programmed into 32 bit mode, the 8 LSBs are ignored.
The PHASE bits control the orientation of the data output of the three stereo channels. By default all
the channels are non-inverting.
0000011
Interface Control
0000011
Interface Control
0000011
Interface Control
0000011
Interface Control
0000011
Interface Control
0000011
Interface Control
REGISTER ADDRESS
REGISTER ADDRESS
REGISTER ADDRESS
REGISTER ADDRESS
REGISTER ADDRESS
REGISTER ADDRESS
BIT
1:0
BIT
BIT
BIT
BIT
5:4
BIT
8:6
2
2
3
2
S modes, the LRP register bit controls the polarity of LRCIN. If this
FMT[1:0]
IWL[1:0]
PHASE
LABEL
LABEL
LABEL
LABEL
LABEL
LABEL
BCP
LRP
LRP
DEFAULT
DEFAULT
DEFAULT
DEFAULT
DEFAULT
DEFAULT
000
00
10
0
0
0
Interface format Select
LRCIN Polarity
DSP Format
BCKIN Polarity
Input Word Length
Output phase direction
1 in bit 6 reverses OUT0L/R.
1 in bit 7 reverses OUT1L/R.
1 in bit 8 reverses OUT2L/R.
00 : right justified mode
01: left justified mode
10: I
11: DSP mode A or B
0 : normal LRCIN polarity
1: inverted LRCIN polarity
0: Mode A
1: Mode B
0 : normal BCKIN polarity
1: inverted BCKIN polarity
00 : 16 bit data
01: 20 bit data
10: 24 bit data
11: 32 bit data
2
S mode
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
PD, October 2008, Rev 4.2
Production Data
15