STMPE1601 STMicroelectronics, STMPE1601 Datasheet - Page 29

• Manufacturer Part Number: STMPE1601
• Description: 16-bit Enhanced Port Expander With Keypad And Pwm Controller Xpander Logic
• Manufacturer: STMicroelectronics

STMPE1601
9.2
Programming sequence
To configure and initialize the Interrupt Controller to allow interruption to host, observe the
following steps:
●
●
●
●
●
●
●
●
●
●
●
Set the INT_EN_MASK and INT_EN_GPIO_MASK registers to the desired values to
enable the interrupt sources that are to be expected to receive from.
Configure the output interrupt type and polarity and enable the global interrupt mask by
writing to the INT_CTRL.
Wait for interrupt.
Upon receiving an interrupt, the INT pin is asserted.
The host comes to read the INT_STA register through the I
INT_STA bits indicates that the corresponding interrupt source is triggered.
If the IS8 bit in INT_STA register is set, the interrupt is coming from the GPIO controller.
Then, a subsequent read is performed on the INT_STA_GPIO register to obtain the
interrupt status of all 16 GPIOs to locate the GPIO that triggers the interrupt. This is a
feature so-called ‘Hot Key’.
After obtaining the interrupt source that triggers the interrupt, the host performs the
necessary processing and operations related to the interrupt source.
If the interrupt source is from the GPIO Controller, two write operations with value of ‘1’
are performed to the ISG[x] bit (INT_STA_GPIO) and the IS[8] (ISR) to clear the
corresponding GPIO interrupt.
If the interrupt source is from other module, a write operation with value of ‘1’ is
performed to the IS[x] (ISR) to clear the corresponding interrupt.
Once the interrupt is being cleared, the INT pin will also be de-asserted if the interrupt
type is level interrupt. An edge interrupt will only assert a pulse width of 250ns.
When the interrupt is no longer required, the IC0 bit in INT_CTRL may be set to ‘0’ to
disable the global interrupt mask bit.
2
C interface. A ‘1’ in the
Interrupt system
29/60