STM690 STMicroelectronics, STM690 Datasheet - Page 6

• Manufacturer Part Number: STM690
• Description: 3v Supervisor With Battery Switchover
• Manufacturer: STMicroelectronics

STM690/704/795/802/804/805/806
Pin Descriptions
MR (Manual Reset). A logic low on /MR asserts
the reset output. Reset remains asserted as long
as MR is low and for t
This active-low input has an internal pull-up. It can
be driven from a TTL or CMOS logic line, or short-
ed to ground with a switch. Leave open if unused.
WDI (Watchdog Input). If WDI remains high or
low for 1.6sec, the internal watchdog timer runs
out and reset is triggered. The internal watchdog
timer clears while reset is asserted or when WDI
sees a rising or falling edge.
The watchdog function cannot be disabled by al-
lowing the WDI pin to float.
RST (Active-low Reset). Pulses
when triggered, and stays low whenever V
below the reset threshold or when MR is a logic
low. It remains low for t
above the reset threshold, the watchdog triggers a
reset, or MR goes from low to high.
RST (Active-high Reset - Open Drain). Pulses
high for t
ever V
is a logic high. It remains high for t
V
triggers a reset, or MR goes from high to low.
PFI (Power-fail Input). When PFI is less than
V
goes low; otherwise, PFO remains high. Connect
to ground if unused.
Table 3. Pin Description
6/32
CC
PFI
STM795
falls below the reset threshold, the watchdog
–
–
7
–
–
–
1
2
3
4
5
6
8
or when V
CC
rec
is above the reset threshold or when MR
when triggered, and stays high when-
STM690
STM802
–
6
7
–
4
5
1
2
–
3
–
–
8
CC
falls below V
Pin
STM704
STM806
rec
rec
6
–
7
–
4
5
1
2
–
3
–
–
8
after MR returns high.
after either V
SW
STM804
STM805
rec
low
(2.4V), PFO
–
6
–
7
4
5
1
2
–
3
–
–
8
after either
CC
for
Vccsw V
CC
Name
E
V
rises
V
PFO
WDI
RST
RST
V
V
MR
PFI
OUT
CON
BAT
t
E
CC
SS
rec
is
Push-button Reset Input
Watchdog Input
Active-Low Reset Output
Active-High Reset Output
Power-fail Input
Power-fail Output
Supply Output for External LPSRAM
Supply Voltage
Ground
Chip Enable Input
Conditioned Chip Enable Output
Backup-Battery Input
CC
PFO (Power-fail Output). When PFI is less than
V
erwise, PFO remains high. Leave open if unused.
V
above the switchover voltage (V
nected to V
switch. When V
to V
Vccsw (V
switches to battery, Vccsw is high. When V
switches back to V
to drive gate of external PMOS transistor for I
requirements exceeding 75mA.
E (Chip Enable Input). The input to the chip-en-
able gating circuit. Connect to ground if unused.
E
low only when E is low and reset is not asserted. If
E
main low for 15µs or until E goes high, whichever
occurs first. In the disabled mode, E
up to V
V
below V
When V
connects to V
to V
PFI
OUT
CON
CON
BAT
Switch Output
OUT
CC
, or V
(Back-up Battery Input). When V
(Supply Output Voltage). When V
(Conditional Chip Enable). E
is low when reset is asserted, E
OUT
if no battery is used.
. Connect to V
CC
SO
CC
CC
.
rises above V
, V
CC
falls below V
Switch Output). When
CC
OUT
CC
. V
through a P-channel MOSFET
CC
falls below V
Function
BAT
switches from V
, Vccsw is low. It can be used
CC
may exceed V
SO
if no battery is used.
SW
+ hysteresis, V
, PFO goes low; oth-
SO
SO
, V
), V
BAT
CON
CON
CC
CC
CON
OUT
. Connect
connects
to V
is pulled
CC
OUT
is con-
will re-
CC
V
goes
BAT
falls
OUT
OUT
OUT
re-
is
.