HY27UF082G2A Hynix Semiconductor, HY27UF082G2A Datasheet - Page 22

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HY27UF082G2A

Manufacturer Part Number
HY27UF082G2A
Description
2gb Nand Flash
Manufacturer
Hynix Semiconductor
Datasheet

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Rev 0.4 / Mar. 2007
CLE Setup time
CLE Hold time
CE setup time
CE hold time
WE pulse width
ALE setup time
ALE hold time
Data setup time
Data hold time
Write Cycle time
WE High hold time
Address to Data Loading time
Data Transfer from Cell to register
ALE to RE Delay
CLE to RE Delay
Ready to RE Low
RE Pulse Width
WE High to Busy
Read Cycle Time
RE Access Time
RE High to Output High Z
CE High to Output High Z
Cache Read RE high
RE High to Output hold
RE Low to Output hold
CE High to Output Hold
RE High Hold Time
Output High Z to RE low
CE Access Time
WE High to RE low
Device Resetting Time (Read / Program / Erase)
Write Protection time
NOTE:
1. If Reset Command (FFh) is written at Ready state, the device goes into Busy for maximum 5us
2. tADL is the time from the WE rising edge of final address cycle to the WE rising of first data cycle.
3. Program / Erase Enable Operation : WP high to WE High.
Program / Erase Disable Operation : WP Low to WE High.
Parameter
Table 13: AC Timing Characteristics
2Gbit (256Mx8bit/128Mx16bit) NAND Flash
Symbol
tADL
tRHOH
tWW
tCRRH
tRLOH
tWHR
tCOH
tRHZ
tCHZ
tREH
tCLS
tCLH
tALS
tALH
tCLR
tREA
tCEA
tRST
tWC
tWH
tWB
tCH
tWP
tDH
tCS
tDS
tAR
tRR
tRP
tRC
tIR
tR
(2)
(3)
HY27UF(08/16)2G2A Series
Min
100
100
15
25
15
15
15
30
10
15
15
20
15
30
15
15
10
60
5
5
5
5
5
0
3.3Volt
5/10/500
Max
100
100
20
25
50
50
30
(1)
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
us
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
us
ns
22

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