NTE8255 NTE Electronics, Inc., NTE8255 Datasheet - Page 4

• Manufacturer Part Number: NTE8255
• Description: Integrated Circuit Programmable Peripheral Interface
• Manufacturer: NTE Electronics, Inc.

Functional Description:
General
The NTE8255 Programmable Peripheral Interface (PPI) is designed for use in 8080A/8085A micro-
processor systems.
8080A/8085A data and control busses with the NTE8255. The NTE8255 is functionally configured
to be programmed by system software to avoid external logic for peripheral interfaces.
Data Bus Buffer
The 3−State, bi−directional, 8−Bit Data Bus Buffer (D
to the processor’s system Data Bus (D
and OUT instructions by the processor. Control Words and Status information are also transmitted
via the Data Bus Buffer.
Read/Write and Control Logic
This block manages all of the internal and external transfers of Data, Control, and Status. Through
this block, the processor Address and Control busses can control the peripheral interfaces.
Chip Select, CS (Pin6)
A Logic Low, V
Read, RD (Pin5)
A Logic Low, V
Data Bus Buffer.
Write, WR (Pin36)
A Logic Low, V
processor.
Port Select 0, A
Port Select 1, A
These two inputs are used in conjunction with CS, RD, and WR to control the selection of one of three
ports on the Control Word Register. A
Address Bus.
Reset (Pin35)
A Logic High, V
mode. The input latches in ports A, B, and C are not cleared.
A
A
X
X
0
0
1
1
1
1
A
A
IL
X
X
0
1
0
1
IL
IL
0
0
IH
, on this input enables the Data Bus Buffer to receive Data or Control Words from the
, on this input enables the NTE8255 to send Data or Status to the processor via the
, on this input enables the NTE8255 for communication with the 8080A/8085A.
0
1
, on this input clears the Control Register and sets ports A, B, and C to the input
(Pin9)
(Pin8)
Peripheral equipment can be effectively and efficiently interfaced to the
RD
RD
X
1
1
1
1
1
WR
WR
X
0
0
0
0
1
Output Operation (WRITE)
0
0
and A
− D
Disable Function
7
CS
CS
). The Data Bus Buffer is controlled by execution in IN
0
0
0
0
1
0
1
are usually connected to A
0
Data Bus → PORT A
Data Bus → PORT B
Data Bus → PORT C
Data Bus → CONTROL
Data Bus → High Z State
Data Bus → High Z State
− D
7
) of the NTE8255 can be directly interfaced
0
and A
1
of the processor