MT9HTF12872RHY-53E Micron Semiconductor Products, MT9HTF12872RHY-53E Datasheet - Page 11

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MT9HTF12872RHY-53E

Manufacturer Part Number
MT9HTF12872RHY-53E
Description
512mb, 1gb X72, Ecc, Sr 200-pin Ddr2 Sdram Sordimm
Manufacturer
Micron Semiconductor Products
Datasheet
Table 12:
Table 13:
PDF: 09005aef828742dd/Source: 09005aef82874316
HTF9C64_128x72RH.fm - Rev. B 10/07 EN
Parameter
Parameter
DC high-level input voltage
DC low-level input voltage
Input voltage (limits)
Input differential-pair cross
voltage
Input differential voltage
Input differential voltage
Input current
Output disabled current
Static supply current
Dynamic supply
Input capacitance
Stabilization time
Input clock slew rate
SSC modulation frequency
SSC clock input frequency deviation
PLL loop bandwidth (–3dB from unity gain)
PLL Specifications
CUA845 device or JEDEC82-21 equivalent
PLL Clock Driver Timing Requirements and Switching Characteristics
Notes:
1. PLL timing and switching specifications are critical for proper operation of the DDR2 DIMM.
Symbol
V
V
I
This is a subset of parameters for the specific PLL used. Detailed PLL information is available
in JEDEC standard JESD82.
ID
ID
I
DDLD
V
V
V
ODL
I
C
V
DD
I
(
(
IN
IH
IN
IX
IL
I
DC
AC
)
)
OE, OS, FBIN, FBIN#
512MB, 1GB (x72, ECC, SR) 200-Pin DDR2 SDRAM SORDIMM
OE, OS, CK, CK#
OE, OS, CK, CK#
Each input
CK, CK#
Pins
n/a
11
(not connected to a PCB)
CK and CK# = 410 MH
OE = L, V
all output are open
Differential input
Differential input
Differential input
V
V
V
I
I
I
Condition
= V
= V
= V
LVCMOS
LVCMOS
C
Micron Technology, Inc., reserves the right to change products or specifications without notice.
L
Symbol
ODL
DD
DD
DD
= 0pf
slr(i)
t
L
or V
or V
or V
= 100mV
SS
SS
SS
Register and PLL Specifications
Z
Min
0.0
0.65 × V
30
1
2
(V
–250
Min
–0.3
DD
0.15
600
–10
100
0.3
2
/2) -
©2007 Micron Technology, Inc. All rights reserved.
DD
0.35 × V
Max
V
V
V
–0.5
(V
33
DD
DD
DD
6
4
Max
+250
DD
0.15
500
300
10
3
+ 0.3
+ 0.4
+ 0.4
/2) +
DD
Units
MHz
V/ns
Units
kHz
µs
%
mA
µA
µA
µA
µA
pF
V
V
V
V
V
V

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