TSSIO16E ATMEL Corporation, TSSIO16E Datasheet - Page 6

• Manufacturer Part Number: TSSIO16E
• Description: Tssio16e Van Peripheral Circuit 16 Inputs-outputs
• Manufacturer: ATMEL Corporation

4.2.4
4.3
6
Programming and Structure of port A and B
TSSIO16E
Local address 6 and 7
A read frame (RANK 16) at local address 5 recovers of two data bytes present on port A and B
wether the direction is input or output.
In the same way as for port A, port B is write-accessible by frames 1, 2 or 3 data bytes.
The read mechanism for port B is identical to that of port A.
Table below summarizes the programming of a port for the corresponding bits in the DATA,
DDR and OPT bytes, and shows the structural organization of the logic ports.
OPT_X(n)
0
0
0
0
1
DDR_X(n)
X
0
0
1
1
B
B
Reading of port B
Writing of port B
DATA_X(n)
X
0
1
0
1
programming of pin n of port X
bi-directional access
forbidden case (even input)
logic output set to 0
logic output set to 1
forbidden case
PB[n]
PA[n]
logic input
I3
I3
1
1
4421B–ASSP–10/05
I2
I2
1
1
I1
I1
0
1