BD8150KVT ROHM Co. Ltd., BD8150KVT Datasheet - Page 15

• Manufacturer Part Number: BD8150KVT
• Description: System Power Supplies Power Suuply Ic Series For Tft-lcd Panels
• Manufacturer: ROHM Co. Ltd.

1. Absolute maximum ratings
2. Connecting the power supply connector backward
3. Power supply lines
4. GND voltage
5. Thermal design
6. Inter-pin shorts and mounting errors
7. Actions in strong electromagnetic field
8. Testing on application boards
9. Regarding input pin of the IC
10. Ground Wiring Pattern
Operation Notes
Parasitic element
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down the
devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any over rated values will expect to
exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses.
Connecting of the power supply in reverse polarity can damage IC. Take precautions when connecting the power supply lines. An external
direction diode can be added.
Design PCB layout pattern to provide low impedance GND and supply lines. To obtain a low noise ground and supply line, separate the
ground section and supply lines of the digital and analog blocks. Furthermore, for all power supply terminals to ICs, connect a capacitor
between the power supply and the GND terminal. When applying electrolytic capacitors in the circuit, not that capacitance characteristic
values are reduced at low temperatures.
The potential of GND pin must be minimum potential in all operating conditions.
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction.
discharge capacitors after each process or step. Always turn the IC's power supply off before connecting it to or removing it from a jig or
fixture during the inspection process. Ground the IC during assembly steps as an antistatic measure. Use similar precaution when
transporting or storing the IC.
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. Always
Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any connection error or if
pins are shorted together.
P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic diode or transistor.
For example, the relation between each potential is as follows:
Parasitic diodes can occur inevitable in the structure of the IC. The operation of parasitic diodes can result in mutual interference among
circuits, operational faults, or physical damage. Accordingly, methods by which parasitic diodes operate, such as applying a voltage that is
lower than the GND (P substrate) voltage to an input pin, should not be used.
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing a single ground
point at the ground potential of application so that the pattern wiring resistance and voltage variations caused by large currents do not cause
variations in the small signal ground voltage. Be careful not to change the GND wiring pattern of any external components, either.
Pin A
N
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
P
+
N
GND
P
P substrate
P
+
N
Resistor
Pin A
Fig.38 Example of IC structure
Parasitic
element
Parasitic element
Pin B
N
15/16
C
B
N
E
GND
P
P substrate
Transistor (NPN)
P
+
N
GND
Other adjacent elements
Pin B
B
C
E
GND
Parasitic
element