NCV4269A ON Semiconductor, NCV4269A Datasheet - Page 12

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NCV4269A

Manufacturer Part Number
NCV4269A
Description
5.0 V Micropower 150 Ma Ldo Linear Regulator With Delay, Adjustable Reset, And Sense Output
Manufacturer
ON Semiconductor
Datasheet

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SENSE INPUT (SI) / SENSE OUTPUT (SO) VOLTAGE
MONITOR
warning to the microprocessor of a possible reset signal
(Figure 4). The output is from an open collector driver with
an internal 20 kW pull up resistor to output Q. The reset signal
typically turns the microprocessor off instantaneously. This
can cause unpredictable results with the microprocessor. The
signal received from the SO pin will allow the microprocessor
time to complete its present task before shutting down. This
function is performed by a comparator referenced to the band
gap voltage. The actual trip point can be programmed
externally using a resistor divider to the input monitor SI
(Figure 21). The values for R
typical threshold of 1.20 V on the SI Pin.
SIGNAL OUTPUT
result of the circuit depicted in Figure 21. As the output
voltage (V
crossed. This causes the voltage on the SO output to go low
sending a warning signal to the microprocessor that a reset
signal may occur in a short period of time. T
time the microprocessor has to complete the function it is
currently working on and get ready for the reset
shutdown signal. When the voltage on the SO goes low and
the RO stays high the current consumption is typically
560 mA at 1 mA load current.
STABILITY CONSIDERATIONS
compensating input line reactance. Possible oscillations caused
by input inductance and input capacitance can be damped by
using a resistor of approximately 1.0 W in series with C
three main characteristics of a linear regulator: startup delay,
load transient response and loop stability.
availability, size and temperature constraints. The
aluminum electrolytic capacitor is the least expensive
solution, but, if the circuit operates at low temperatures
V
V
SI,Low
SO
V
RO
An on−chip comparator is available to provide early
Figure 22 shows the SO Monitor timing waveforms as a
The input capacitor C
The output or compensation capacitor helps determine
The capacitor value and type should be based on cost,
SI
Q
Figure 22. SO Warning Waveform Time Diagram
Q
) falls, the monitor threshold (V
I
in Figure 21 is necessary for
SI1
and R
T
WARNING
SI2
are selected for a
WARNING
SI,Low
http://onsemi.com
I.
is the
), is
12
(−25°C to −40°C), both the value and ESR of the capacitor
will vary considerably. The capacitor manufacturer’s data
sheet usually provides this information.
work for most applications; however, it is not necessarily the
optimized solution. Stability is guaranteed at C
2.2 mF and max ESR is 10 W. There is no min ESR limit
which was proved with MURATA’s ceramic caps
GRM31MR71A225KA01 (2.2 mF, 10 V, X7R, 1206) and
GRM31CR71A106KA01 (10 mF, 10 V, X7R, 1206) directly
soldered between output and ground pins.
CALCULATING POWER DISSIPATION IN A SINGLE
OUTPUT LINEAR REGULATOR
regulator (Figure 21) is:
where:
V
V
I
and I
I
permissible value of R
package section of the data sheet. Those packages with
R
the die temperature below 150°C. In some cases, none of the
packages will be sufficient to dissipate the heat generated by
the IC, and an external heatsink will be required. The current
flow
Measurement Circuit Diagram.
H
package to improve the flow of heat away from the IC and
into the surrounding air.
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
determine the value of R
where:
R
R
R
R
functions of the package type, heatsink and the interface
between them. These values appear in data sheets of
heatsink
heatsinking
ON Semiconductor application note AN1040/D, available
on the ON Semiconductor website.
Q(max)
Q(max)
qJA
EATSINKS
qJC
qCS
qSA
qJA
P D(max) + [V I(max) * V Q(min) ] I Q(max) ) V I(max) I q (eq. 4)
I(max)
Q(min)
The 10 mF output capacitor C
The maximum power dissipation for a single output
Once the value of P
The value of R
A heatsink effectively increases the surface area of the
Each material in the heat flow path between the IC and the
R
qJC
’s less than the calculated value in equation 2 will keep
, it too is a function of package type. R
q
= the junction−to−case thermal resistance,
= the case−to−heat sink thermal resistance, and
= the heat sink−to−ambient thermal resistance.
.
is the quiescent current the regulator consumes at
is the maximum output current for the application,
appears in the package section of the data sheet. Like
is the maximum input voltage,
is the minimum output voltage,
and
manufacturers.
R
qJA
R qJA + R qJC ) R qCS ) R qSA
considerations
qJA
voltages
= (150°C – T
can then be compared with those in the
qJA
qJA
D(max)
can be calculated:
:
A
Thermal,
) / P
are
Q
are
is known, the maximum
shown in Figure 21 should
D
shown
discussed
mounting,
qCS
and R
in
Q
in
qSA
(eq. 5)
(eq. 6)
is min
and
the
the
are

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