CY82C693UB Cypress Semiconductor Corporation., CY82C693UB Datasheet - Page 104
CY82C693UB
Manufacturer Part Number
CY82C693UB
Description
Hypercache Tm / Stand-alone Pci Peripheral Controller With Usb
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
1.CY82C693UB.pdf
(164 pages)
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RTC Register 12: Control/Status Register C (Read Only)
RTC Register 13: Control/Status Register D (Read Only)
RTC Registers 14-127: Battery-Backable Scratch Block 1 (Read/Write)
RTC Registers 128-255: Battery-Backable Scratch Block 2 (Read/Write)
NOTE: These Registers are accessed through I/O ports 072H and 073H (not 070H and 071H-the ports for the other RTC
registers)
3CY82C693UB
Bit
7
6
5
4
3:0
Bit
7
6:0
Bit
7:0
Bit
7:0
Function
Interrupt Request Flag:
0:
1:
and the interrupt enable bits (bits 6–4 of RTC Register 11) indicate which event(s) caused
the interrupt to occur. This bit is cleared by the assertion of PSRSTB or a read to this register.
Periodic Interrupt Flag:
0:
1:
Note: An interrupt will not be generated and bit 7 will not be set if Periodic Interrupts are
disabled. This bit is cleared by the assertion of PSRSTB or a read to this register.
Alarm Interrupt Flag:
0:
1:
Note: An interrupt will not be generated and bit 7 will not be set if Alarm Interrupts are disabled.
This bit is cleared by the assertion of PSRSTB or a read to this register.
Update-Ended Interrupt Flag:
0:
1:
Note: An interrupt will not be generated and bit 7 will not be set if Update-Ended Interrupts
are disabled. This bit is cleared by the assertion of PSRSTB or a read to this register.
Reserved (Read as all zeroes).
Function
Valid RAM and Time Flag:
0:
1:
Reserved (Read as all zeroes).
Function
User Defined
Function
User Defined
No RTC Interrupts have occurred.
An RTC Interrupt has occurred. The specific interrupt flags (bits 6–4 of this register)
The period timer has not reached its terminal count.
The period timer has reached its terminal count
The clock did not match the alarm values.
The clock did match the alarm values.
An Update Cycle did not end
An Update Cycle did end
The contents of the RAM and Time are not guaranteed to be valid
The contents of the RAM and Time are valid
PRELIMINARY
104
Index=0CH
Index=0DH
4CY82C693UB
Indices=0EH-7FH
Indices=80H-FFH
CY82C693UB
Default
0
0
0
0
0000
Default
0
0000000
Default
00000000
Default
00000000
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