LMX2324 National Semiconductor Corporation, LMX2324 Datasheet
LMX2324
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LMX2324 Summary of contents
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... Serial data is transferred into the LMX2324 via a three-line MICROWIRE ™ interface (Data, LE, Clock). Supply voltage range is from 2.7V to 5.5V. The LMX2324 features very low current consumption, typically 3 3V. The charge pump provides 4 mA output current. The LMX2324 is manufactured using National’s ABiC V BiCMOS process and is packaged in a 16-pin TSSOP and a 16-pin Chip Scale Package (CSP) ...
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... I RF prescaler complimentary input. In single-ended mode, a bypass capacitor should be placed as close as possible to this pin and be connected directly to the ground plane. The LMX2324 can be driven differentially when the bypass capacitor is omitted prescaler input. Small signal input from the voltage controlled oscillator. ...
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Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Power Supply Voltage ( Power Supply for Charge Pump (V P Voltage on Any Pin with GND ...
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Charge Pump Current Specification Definitions − ∆ sink current at VCP = sink current at VCP = ∆ sink current at VCP o ...
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... See programming description 2.2.1. 1.3 PROGRAMMABLE DIVIDERS (N COUNTER) The N counter is clocked by the small signal f pins. The LMX2324 RF N counter is 15 bit integer divider. The N counter is configured bit A Counter and a 10 bit B Counter, offering a continuous integer divide range from 992 to 32,767. The LMX2324 is capable of operating from 100 MHz to 2 ...
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... Programming Description 2.1 MICROWIRE INTERFACE The LMX2324 register set can be accessed through the MICROWIRE interface. A 18-bit shift register is used as a temporary register to indirectly program the on-chip registers. The shift register consists of a 17-bit DATA[16:0] field and a 1-bit address (ADDR) field as shown below. The address field is used to decode the internal register address. Data is clocked into the shift register in the direction from MSB to LSB, when the CLOCK signal goes high ...
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Programming Description 2.2 R REGISTER If the Address Bit (ADDR when LE is transitioned high data is transferred from the 18-bit shift register into the 14-bit R register. The R register contains a latch which sets the ...
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Programming Description 2.3 N REGISTER If the address bit is LOW (ADDR=0) when LE is transitioned high, data is transferred from the 18-bit shift register into the 17-bit N register. The N register consists of the 5-bit swallow counter ...
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... R counter. (The maximum error is one prescaler cycle). Both synchronous and asynchronous power down modes are available with the LMX2324 to be able to adapt to different types of applications. The MICROWIRE control register remains active and capable of loading and latching in data during all of the powerdown modes ...
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Phase Comparator and Internal Charge Pump Characteristics Notes: Phase difference detection range: −2π to +2π The minimum width pump up and pump down current pulses occur at the Phase comparator input from the R Divider R f ...
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... Physical Dimensions inches (millimeters) unless otherwise noted 16-Pin Thin Shrink Small Outline Package Order Number LMX2324TM, LMX2324TMX NS Package Number MTC16 11 www.national.com ...
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... National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. inches (millimeters) unless otherwise noted (Continued) 16-Pin Chip Scale Package Order Number LMX2324SLBX NS Package Number SLB16A 2. A critical component is any component of a life ...