PDU10256H Data Delay Devices, Inc., PDU10256H Datasheet - Page 5
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PDU10256H
Manufacturer Part Number
PDU10256H
Description
8-bit, Ecl-interfaced Programmable Delay Line
Manufacturer
Data Delay Devices, Inc.
Datasheet
1.PDU10256H.pdf
(5 pages)
INPUT:
Ambient Temperature: 25
Supply Voltage (Vcc): -5.0V
Input Pulse:
Source Impedance:
Rise/Fall Time:
Pulse Width:
Period:
NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.
GENERATOR
Doc #97047
12/17/97
INPUT
SIGNAL
OUTPUT
SIGNAL
PULSE
OUT
TRIG
20%
50%
80%
T
RISE
T
RISE
Standard 10KH ECL
levels
50
2.0 ns Max. (measured
between 20% and 80%)
PW
PER
Timing Diagram For Testing
o
IN
C
IN
IN
PW
Max.
DELAY LINE AUTOMATED TESTING
= 1.5 x Total Delay
V
ADDRESS SELECT
= 10 x Total Delay
3
DEVICE UNDER
0.1V
IH
3 Mt. Prospect Ave. Clifton, NJ 07013
IN
o
Test Setup
C
TEST (DUT)
50%
DATA DELAY DEVICES, INC.
TEST CONDITIONS
80%
50%
20%
PER
V
OH
IN
OUT
T
FALL
T
FALL
50%
V
REF
IN
TRIG
OUTPUT:
Load:
C
Threshold:
IL
load
:
OSCILLOSCOPE
V
50
5pf
(V
(Rising & Falling)
OL
OH
to -2V
+ V
10%
OL
) / 2
PDU10256H
5