MR25H10 Everspin Technologies, Inc, MR25H10 Datasheet - Page 2

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MR25H10

Manufacturer Part Number
MR25H10
Description
Mr25h10 1mb Serial Spi Mram
Manufacturer
Everspin Technologies, Inc
Datasheet

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Everspin Technologies © 2009
1. DEVICE PIN ASSIGNMENT
Overview
System Configuration
The MR25H10 is a serial MRAM with memory array logically organized as 128Kx8 using the four pin in-
terface of chip select (CS), serial input (SI), serial output (SO) and serial clock (SCK) of the serial peripheral
interface (SPI) bus. Serial MRAM implements a subset of commands common to today’s SPI EEPROM and
Flash components allowing MRAM to replace these components in the same socket and interoperate on
a shared SPI bus. Serial MRAM offers superior write speed, unlimited endurance, low standby & operating
power, and more reliable data retention compared to available serial memory alternatives.
Single or multiple devices can be connected to the bus as show in Figure 1.2. Pins SCK, SO and SI are com-
mon among devices. Each device requires CS and HOLD pins to be driven seperately.
HOLD
SCK
WP
CS
SI
Micro Controller
SPI
Figure 1.2 System Configuration
Instruction Register
Instruction Decode
Address Register
Clock Generator
Write Protect
Control Logic
Counter
Figure 1.1 Block Diagram
SCK
MOSI
MISO
CS
HOLD
CS
HOLD
1
2
1
2
EVERSPIN SPI MRAM 1
SO
CS
17
SI
2
HOLD
SCK
Document Number: MR25H10 Rev. 4, 2/2010
MRAM ARRAY
Data I/O Register
Nonvolatile Status
EVERSPIN SPI MRAM 2
128KB
CS
SO
Register
MOSI = Master Out Slave In
MISO = Master In Slave Out
4
8
SI
HOLD
SCK
SO
MR25H10

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