CY2077 Cypress Semiconductor Corporation., CY2077 Datasheet - Page 3

• Manufacturer Part Number: CY2077
• Description: High-accuracy Eprom Programmable Single-pll Clock Generator
• Manufacturer: Cypress Semiconductor Corporation.

Power Management Features
PWR_DWN and OE options are configurable by EPROM
programming for the CY2077. In PWR_DWN mode, all active
circuits are powered down when the control pin is set LOW.
When the control pin is set back HIGH, both the PLL and oscil-
lator circuit must relock. In the case of OE, the output is
three-stated and weakly pulled down when the control pin is set
LOW. The oscillator and PLL are still active in this state, which
leads to a quick clock output return when the control pin is set
back HIGH.
Table 3. Device Functionality: Output Frequencies
Absolute Maximum Ratings
Exceeding maximum ratings may shorten the useful life of the
device. User guidelines are not tested.
Supply voltage .................................................. –0.5 to +7.0V
Operating Conditions for Commercial Temperature Device
T
C
C
X
t
Document Number: 38-07210 Rev. *C
Fo
Parameter
V
PU
A
REF
TTL
CMOS
DD
Symbol
Supply voltage
Operating temperature, ambient
Max. capacitive load on outputs for TTL levels
Max. capacitive load on outputs for CMOS levels
Reference frequency, input crystal with C
Reference frequency, external clock source
Power up time for all VDD's to reach minimum specified voltage (power ramps must
be monotonic)
Output frequency
V
V
V
V
V
V
V
V
DD
DD
DD
DD
DD
DD
DD
DD
Description
= 4.5 – 5.5V, output frequency = 1 – 40 MHz
= 4.5 – 5.5V, output frequency = 40 – 125 MHz
= 4.5 – 5.5V, output frequency = 125 – 133 MHz
= 4.5 – 5.5V, output frequency = 1 – 40 MHz
= 4.5 – 5.5V, output frequency = 40 – 125 MHz
= 4.5 – 5.5V, output frequency = 125 – 133 MHz
= 3.0 – 3.6V, output frequency = 1 – 40 MHz
= 3.0 – 3.6V, output frequency = 40 – 100 MHz
Description
V
V
load
DD
DD
Condition
= 10 pF
= 4.5–5.5V
= 3.0–3.6V
Additionally, PWR_DWN and OE can be configured to occur
asynchronously or synchronously with respect to CLKOUT. In
asynchronous mode, PWR_DWN or OE disables CLKOUT
immediately (allowing for logic delays), without respect to the
current state of CLKOUT. Synchronous mode prevents output
glitches by waiting for the next falling edge of CLKOUT after
PWR_DWN, or OE becomes asserted. In either asynchronous
or synchronous setting, the output is always enabled synchro-
nously by waiting for the next falling edge of CLKOUT.
Input voltage ........................................... –0.5V to V
Storage temperature (non-condensing)...... –55°C to +150°C
Junction temperature.................................................. 150°C
Static discharge voltage........................................... > 2000V
(per MIL-STD-883, method 3015)
0.39
0.39
Min
Max
133
100
0.05
Min
3.0
10
0
1
Max
+70
5.5
50
25
15
50
25
15
30
15
30
50
75
CY2077
Page 3 of 14
MHz
MHz
DD
Unit
+0.5V
MHz
MHz
Unit
ms
°C
pF
pF
pF
pF
pF
pF
pF
pF
V
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