RFPIC12C509AG Microchip Technology Inc., RFPIC12C509AG Datasheet
RFPIC12C509AG
Related parts for RFPIC12C509AG
RFPIC12C509AG Summary of contents
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... CMOS Microcontroller with UHF ASK/FSK Transmitter 2001 Microchip Technology Inc. rfPIC12C509AG/509AF Preliminary Data Sheet DS70031A ...
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... QS-9000 compliant for its PICmicro ® 8-bit MCUs ® devices, Serial EEPROMs and microperipheral products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001 certified. Preliminary L , SEEVAL code hopping 2001 Microchip Technology Inc. ...
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... Internal weak pull-ups on I/O pins • Internal pull-up on MCLR pin • Selectable oscillator options: - INTRC: Internal 4 MHz RC oscillator - EXTRC: External low-cost RC oscillator - XT: Standard crystal/resonator - LP: Power saving, low frequency crystal 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF Pin Diagram SOIC V GP5/OSC1/CLKIN GP4/OSC2 GP3/MCLR/V RFEN CLKOUT PS/DATA V ...
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... CMOS Technology: • Low power, high speed CMOS EPROM technology • Fully static design • Wide operating voltage range • Wide temperature range: - Industrial: -40°C to +85°C ® • PICmicro MCU power consumption: - < 5V, 4 MHz - 15 A typical @ 3V, 32 KHz - < ...
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... Packaging Information................................................................................................................................................................ 93 On-Line Support................................................................................................................................................................................... 99 Reader Response .............................................................................................................................................................................. 100 rfPIC12C509AG/509AF Product Identification System ...................................................................................................................... 101 TO OUR VALUED CUSTOMERS It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Micro- chip products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and enhanced as new volumes and updates are introduced ...
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... PICmicro MCU and the transmitter. The PICmicro MCU oscillator is independent from the transmitter crystal oscillator. The rfPIC12C509AG is capable of Amplitude Shift Key- ing (ASK) modulation by turning the PA on and off. The rfPIC12C509AF is capable of ASK or Frequency Shift Keying (FSK) modulation by employing an internal FSK switch to pull the transmitter crystal via a second load capacitor ...
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... Serial Programming Number of Instructions Packages The rfPIC12C509AG/509AF has Power-on Reset, selectable Watchdog Timer, select- able code protect and high I/O current capability. The rfPIC12C509AG/509AF has serial programming with data pin GP0 and clock pin GP1. 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF rfPIC12C509AG ...
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... NOTES: DS70031A-page 6 Premilinary © 2001 Microchip Technology Inc. ...
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... Microchip's PICSTART PLUS and PRO MATE grammers all support programming rfPIC12C509AG/509AF. Third party programmers also are available; refer to the Microchip Third Party Guide (DS00104) for a list of sources. 2.2 One-Time-Programmable (OTP) Devices The availability of OTP devices is especially useful for customers who need the flexibility for frequent code updates or small volume applications ...
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... NOTES: DS70031A-page 8 Preliminary © 2001 Microchip Technology Inc. ...
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... PLL loop filter. There are no internal electrical connec- tions between the PICmicro MCU and the transmitter. The rfPIC12C509AG is capable of Amplitude Shift Key- ing (ASK) modulation by turning the PA on and off. The rfPIC12C509AF is capable of ASK or Frequency Shift ...
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... RF devices require correct board level implementation in order to meet regulatory requirements. Layout con- siderations are given in Section 7.0 UHF ASK/FSK Transmitter. A simplified block diagram is shown in Figure 3-1, with the corresponding device pins described in Table 3-1. DS70031A-page 10 Preliminary © 2001 Microchip Technology Inc. ...
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... FIGURE 3-1: rfPIC12C509AG/509AF BLOCK DIAGRAM 12 EPROM 1024 x 12 Program Memory Program 12 Bus Instruction reg 8 Instruction Decode & Control Timing OSC1/CLKIN Generation OSC2 Internal RC OSC MCLR RFEN IN CLKOUT PS/DATA ASK 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF 8 Data Bus Program Counter RAM STACK1 ...
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... TABLE 3-1: rfPIC12C509AG/509AF PINOUT DESCRIPTION SOIC SSOP Name CERDIP Pin # Pin # GP0 17 19 GP1 16 18 GP2/T0CKI 15 17 GP3/MCLR GP4/OSC2 3 3 GP5/OSC1/CLKIN RFEN CLKOUT 6 7 PS/DATA 7 8 ASK DDRF ANT2 9 10 ANT1 ...
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... All instructions are single cycle, except for any program branches. These take two cycles since the fetch instruction is “flushed” from the pipeline while the new instruction is being fetched and then executed. 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF 3.4 Instruction Flow/Pipelining An Instruction Cycle consists of four Q cycles (Q1, Q2, Q3 and Q4) ...
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... NOTES: DS70031A-page 14 Preliminary © 2001 Microchip Technology Inc. ...
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... For devices with more than 512 bytes of program memory, a paging scheme is used. Program memory pages are accessed using one STATUS register bit. For the rfPIC12C509AG/ 509AF, with a data memory register file of more than 32 registers, a banking scheme is used. Data memory banks are accessed using the File Select Register (FSR) ...
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... DS70031A-page 16 The general purpose registers are used for data and control information under command of the instructions. For the rfPIC12C509AG/509AF, the register file is com- posed of 7 special function registers, 25 general pur- pose registers, and 16 general purpose registers that may be addressed using a banking scheme (Figure 4- 2) ...
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... If RESET was due to Wake-up-on-Pin Change then bit All other RESETS will cause bit 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF The special registers can be classified into two sets. The special function registers associated with the “core” functions are described in this section. Those related to the operation of the peripheral features are described in the section for each peripheral feature ...
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... STATUS Register This register contains the arithmetic status of the ALU, the RESET status, and the page preselect bit for pro- gram memories larger than 512 words. The STATUS register can be the destination for any instruction, as with any other register. If the STATUS ...
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... Microchip Technology Inc. © rfPIC12C509AG/509AF Note: If TRIS bit is set to ‘0’, the wake-up on change and pull-up functions are disabled for that pin (i.e., note that TRIS overrides OPTION control of GPPU and GPWU). Note: If the T0CS bit is set to ‘1’, GP2 is forced input even if TRIS GP2 = ‘ ...
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... OSCCAL Register The Oscillator Calibration (OSCCAL) register is used to calibrate the internal 4 MHz oscillator. It contains six bits for calibration. Increasing the cal value increases the frequency. See Section 8.2.5 for more information on the internal oscillator. FIGURE 4-5: OSCCAL REGISTER (ADDRESS 05h) R/W-1 R/W-0 R/W-0 R/W-0 CAL5 CAL4 ...
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... Stack The rfPIC12C509AG/509AF device has a 12-bit wide L.I.F.O. hardware push/pop stack. A CALL instruction will push the current value of stack 1 into stack 2 and then push the current program counter value, incremented by one, into stack level 1. If more than two sequential CALL’ ...
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... The FSR is a 5-bit wide register used in conjunc- tion with the INDF register to indirectly address the data memory area. The FSR<4:0> bits are used to select data memory addresses 00h to 1Fh. rfPIC12C509AG/509AF: between bank 0 and bank 1. FSR<7:6> is unimple- mented, read as '1’. (opcode) 0 ...
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... The TRIS registers are “write-only” and are set (output drivers disabled) upon RESET. 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF 5.3 I/O Interfacing The equivalent circuit for an I/O port pin is shown in Figure 5-1. All port pins, except GP3 which is input only, may be used for both input and output operations. ...
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... TABLE 5-1: SUMMARY OF PORT REGISTERS Address Name Bit 7 Bit 6 N/A TRIS — — OPTION GPWU GPPU N/A STATUS 03H GPWUF — 06h GPIO — — Legend: Shaded cells not used by Port Registers, read as ‘0’, — = unimplemented, read as '0 unknown unchanged see tables in Section 8.7 for possible values. ...
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... GP5:GP0 Port pin written here Instruction executed MOVWF GPIO (Write to GPIO) 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF This example shows a write to GPIO followed by a read from GPIO. NOP NOP Data setup time = (0.25 T where: T Port pin Therefore, at higher clock frequencies, a sampled here write followed by a read may be problematic ...
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... NOTES: DS70031A-page 26 Preliminary © 2001 Microchip Technology Inc. ...
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... Note 1: Bits T0CS, T0SE, PSA, PS2, PS1 and PS0 are located in the OPTION register. 2: The prescaler is shared with the Watchdog Timer (Figure 6-5). 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF the following two instruction cycles (Figure 6-2 and Figure 6-3). The user can work around this by writing an adjusted value to the TMR0 register. ...
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... FIGURE 6-2: TIMER0 TIMING: INTERNAL CLOCK/NO PRESCALE (Program Counter) PC-1 PC Instruction MOVWF TMR0 Fetch T0 Timer0 T0+1 Instruction Executed FIGURE 6-3: TIMER0 TIMING: INTERNAL CLOCK/PRESCALE 1 ...
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... The arrows indicate the points in time where sampling occurs. 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF When a prescaler is used, the external clock input is divided by the asynchronous ripple counter-type pres- caler so that the prescaler output is symmetrical. For the external clock to meet the sampling requirement, the ripple counter must be taken into account ...
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... Prescaler An 8-bit counter is available as a prescaler for the Timer0 module postscaler for the Watchdog Timer (WDT), respectively (Section 8.6). For simplicity, this counter is being referred to as “prescaler” through- out this data sheet. Note that the prescaler may be used by either the Timer0 module or the WDT, but not both ...
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... Fosc/4) CY GP2/T0CKI Pin T0SE Watchdog Timer PSA WDT Enable bit Note: T0CS, T0SE, PSA, PS2:PS0 are bits in the OPTION register. 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF Sync Cycles T0CS PSA 8-bit Prescaler 1MUX ...
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... NOTES: DS70031A-page 32 Preliminary © 2001 Microchip Technology Inc. ...
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... Power Amplifier (PA), and mode control logic. External components consist of bypass capacitors, crystal, and PLL loop filter. The rfPIC12C509AG is capable of Amplitude Shift Keying (ASK) modulation. The rfPIC12C509AF is capable of ASK or Frequency Shift Keying (FSK) modulation by employing an internal FSK switch to pull the transmitter crystal via a second load capacitor ...
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... FIGURE 7-1: rfPIC12C509AG/509AF TRANSMITTER BLOCK DIAGRAM RFEN IN CLKOUT PS/DATA ASK DS70031A-page 34 Mode Control FSK Switch Logic rfPIC12C509AF Only Crystal Divide Oscillator by 4 Phase Frequency Detector Charge Pump Fixed Divide Voltage by 32 Controlled Oscillator (VCO) Power Amplifier (PA) ANT2 Preliminary DATA FSK FSK ...
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... CRYSTAL OSCILLATOR ASK OPERATION The rfPIC12C509AG or 509AF crystal oscillator can be configured for ASK operation. Figure 7-2 shows an example ASK circuit. Capacitor C1 trims the crystal load capacitance to the circuit load capacitance and places the crystal on the desired frequency. TABLE 7-2: XTAL OSC APPROXIMATE FREQ. VS. CAPACITANCE (ASK MODE) ...
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... CRYSTAL OSCILLATOR FSK OPERATION The rfPIC12C509AF crystal oscillator can be config- ured for FSK operation. Figure 7-3 shows an example FSK circuit. Capacitors C1 and C2 achieve FSK modu- lation by pulling the crystal. When DATA OUT is high-impedance effectively coupling only capacitor C1 to the crystal and the resulting transmit frequency equals f ...
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... Phase noise refers to 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF noise generated by the PLL. Spur levels and phase noise can increase the signal to noise ratio (SNR) of the system and mask or degrade the transmitted sig- nal ...
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... FIGURE 7-5: EXAMPLE LOOP FILTER CIRCUIT rfPIC12C509AG TABLE 7-4: EXAMPLE LOOP FILTER VALUES Loop BW 0.01 uF 390 pF 680 165 kHz 3900 pF 100 pF 1.5K 360 kHz 1500 2.7K 610 kHz 1000 4.7K 1.05 MHz Note 1: Standard Operating Conditions (unless otherwise stated 433.92 MHz ...
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... OPEN = 25° pin. ASK = 0 (V ASK SSRF Preliminary EXAMPLE ASK POWER SELECT CIRCUIT rfPIC12C509AG PS/DATA ASK To power select circuitry R2 EXAMPLE FSK POWER SELECT CIRCUIT rfPIC12C509AF PS/DATA To power ASK select circuitry ...
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... Mode Control Logic The mode control logic pin RFEN controls the oper- IN ation of the transmitter (Table 7-6). When RFEN 1 the transmitter and CLKOUT are enabled. When RFEN = 0 the transmitter and CLKOUT are in IN standby mode. In standby mode the transmitter draws the least amount of current. The RFEN has an internal pull-down resistor ...
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... Application Circuits 7.8.1 EXAMPLE rfPIC12C509AG ASK CIRCUIT 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF Preliminary DS70031A-page 41 ...
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... EXAMPLE rfPIC12C509AF FSK CIRCUIT DS70031A-page 42 Preliminary © 2001 Microchip Technology Inc. ...
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... SPECIAL FEATURES OF THE CPU The rfPIC12C509AG/509AF microcontroller has a host of features intended to maximize system reliability, min- imize cost through elimination of external components, provide power saving operating modes and offer code protection. These features are: • Oscillator selection • RESET - Power-on Reset (POR) ...
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... The oscillator frequency is a primary factor in determin- ing PICmicro microcontroller unit (MCU) current draw rough guideline, the rfPIC12C509AG/509AF draws approximately 250 A per MHz. The rfPIC12C509AG/509AF can be operated in four different oscillator modes. The user can program two configuration bits (FOSC1:FOSC0) to select one of these four modes: • ...
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... EXT variation due to tolerance of external R and C compo- nents used. Figure 8-4 shows how the R/C combination is con- nected to the rfPIC12C509AG/509AF. For R below 2 the oscillator operation may become unstable, or stop completely. For very high R (e.g the oscillator becomes sensitive to noise, humidity and leakage. Thus, we recommend keeping ...
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... The calibration value must be read prior to erasing the part can be repro- grammed correctly later. For the rfPIC12C509AG/509AF bits <7:2>, CAL5- CAL0 are used for calibration. Adjusting CAL5-0 from 000000 to 111111 yields a higher clock speed. Note that bits 1 and 0 of OSCCAL are unimplemented and should be written as 0 when modifying OSCCAL for compatibility with future devices ...
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... MCLR Reset during SLEEP WDT Reset during SLEEP WDT Reset normal operation Wake-up from SLEEP on pin change Legend unchanged unknown unimplemented bit, read as ‘0’. 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF Address Power-on Reset — qqqq qqxx 00h xxxx xxxx 01h ...
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... MCLRE WEAK PULL-UP GP3/MCLR/V PP 8.4 Power-On Reset (POR) The rfPIC12C509AG/509AF incorporates Power-on Reset (POR) circuitry which provides an internal chip RESET for most power-up situations. The on-chip POR circuit holds the chip in RESET until V has reached a high enough level for proper oper- DD ation. To take advantage of the internal POR, program ...
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... INTERNAL RESET FIGURE 8-8: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED TO V TIME V DD MCLR INTERNAL POR DRT TIME-OUT INTERNAL RESET 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF Pin Change POR (Power-on Reset) SLEEP WDT Time-out RESET 8-bit Asynch Ripple Counter (Start-up Timer) T DRT Preliminary ...
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... DD value. In this example, the chip will RESET properly if, and only if, V1 8.5 Device Reset Timer (DRT) In the rfPIC12C509AG/509AF, DRT runs from RESET and varies based on oscillator selection (see Table 8- 5). The DRT operates on an internal RC oscillator. The processor is kept in RESET as long as the DRT is active ...
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... OPTION GPWU GPPU Legend: Shaded boxes = Not used by Watchdog Timer, — = unimplemented, read as '0 unchanged 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF Under worst case conditions (V = Max., max. WDT prescaler), it may take several sec- onds before a WDT time-out occurs. 8.6.2 WDT PROGRAMMING CONSIDERATIONS ...
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... A Brown-out is a condition where device power (V dips below its minimum value, but not to zero, and then recovers. The device should be RESET in the event of a Brown-out. To RESET the rfPIC12C509AG/509AF when a Brown-out occurs, external Brown-out protection circuits may be built, as shown in Figure 8-11, Figure 8-12 and Figure 8-13. FIGURE 8-11: ...
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... The PD bit, which is set on power-up, is cleared when SLEEP is invoked. 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF The GPWUF bit indicates a change in state while in SLEEP at pins GP0, GP1, or GP3 (since the last time there was a file or bit operation on GP port). ...
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... The last memory location can be read regardless of the code protection bit setting on the rfPIC12C509AG/ 509AF. 8.10 ID Locations Four memory locations are designated as ID locations where the user can store checksum or other code-iden- tification numbers ...
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... A typical in-circuit serial programming connection is shown in Figure 8-14. 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF FIGURE 8-14: TYPICAL IN-CIRCUIT SERIAL PROGRAMMING with CONNECTION To Normal Connections External Connector Signals + CLK Data I/O To Normal Connections Preliminary rfPIC12C509AG/ 509AF MCLR/V PP GP1 GP0 V DD DS70031A-page 55 ...
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... NOTES: DS70031A-page 56 Preliminary © 2001 Microchip Technology Inc. ...
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... INSTRUCTION SET SUMMARY Each rfPIC12C509AG/509AF instruction is a 12-bit word divided into an OPCODE, which specifies the instruction type, and one or more operands which fur- ther specify the operation of the instruction. The rfPIC12C509AG/509AF instruction set summary in Table 9-2 groups the instructions into byte-oriented, bit- oriented, and literal and control operations ...
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... TABLE 9-2: INSTRUCTION SET SUMMARY Mnemonic, Operands Description Add W and f ADDWF f,d ANDWF f,d AND W with f Clear f CLRF f Clear W CLRW – Complement f COMF f, d DECF f, d Decrement f Decrement f, Skip if 0 DECFSZ f, d Increment f INCF f, d Increment f, Skip if 0 INCFSZ f, d Inclusive OR W with f ...
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... AND’ed with the eight-bit literal 'k'. The result is placed in the W register Words: 1 Cycles: 1 Example: ANDLW 0x5F Before Instruction W = 0xA3 After Instruction W = 0x03 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF ANDWF Syntax: Operands: Operation: Status Affected: Z Encoding: Description: . Words: Cycles: Example: Before Instruction W = FSR = After Instruction W = ...
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... BSF Bit Set f Syntax: [ label ] BSF f,b Operands Operation: 1 (f<b>) Status Affected: None Encoding: 0101 bbbf ffff Description: Bit 'b' in register 'f' is set. Words: 1 Cycles: 1 Example: BSF FLAG_REG, Before Instruction FLAG_REG = 0x0A After Instruction FLAG_REG = 0x8A BTFSC Bit Test f, Skip if Clear ...
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... Example: CLRF FLAG_REG Before Instruction FLAG_REG = 0x5A After Instruction FLAG_REG = 0x00 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF CLRW Clear W Syntax: [ label ] CLRW Operands: None Operation: 00h 1 Z Status Affected: Z Encoding: 0000 Description: The W register is cleared. Zero bit (Z) is set. Words: ...
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... COMF Complement f Syntax: [ label ] COMF f,d Operands [0,1] Operation: (f) (dest) Status Affected: Z Encoding: 0010 01df ffff Description: The contents of register 'f' are comple- mented the result is stored in the W register the result is stored back in register 'f'. Words: 1 Cycles: 1 Example: ...
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... Before Instruction PC = address (HERE) After Instruction CNT = CNT + 1; if CNT = address (CONTINUE CNT address (HERE +1) 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF IORLW Syntax: Operands: Operation: Status Affected: Z Encoding: Description: Words: Cycles: Example: Before Instruction W = After Instruction IORWF Syntax: ...
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... MOVF Move f Syntax: [ label ] MOVF f,d Operands [0,1] Operation: (f) (dest) Status Affected: Z Encoding: 0010 00df ffff Description: The contents of register 'f' is moved to destination 'd destination is the W register the destination is file register 'f'. ' useful to test a file register since status flag Z is affected ...
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... RETLW k2 ; • • • RETLW kn ; End of table Before Instruction W = 0x07 After Instruction W = value of k8 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF RLF Rotate Left f through Carry Syntax: [ label ] RLF Operands [0,1] Operation: See description below Status Affected: C Encoding: 0011 Description: The contents of register 'f' are rotated one bit to the left through the Carry Flag ...
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... SLEEP Enter SLEEP Mode Syntax: [ label ] SLEEP Operands: None Operation: 00h WDT; 0 WDT prescaler Status Affected: TO, PD, GPWUF Encoding: 0000 0000 0011 Description: Time-out status bit (TO) is set. The power down status bit (PD) is cleared. GPWUF is unaffected. The WDT and its prescaler are cleared ...
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... Cycles: 1 Example TRIS GPIO Before Instruction W = 0XA5 After Instruction TRIS = 0XA5 Note for PIC12C5XX only. 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF XORLW Syntax: Operands: Operation: Status Affected: Z Encoding: Description: Words: Cycles: Example: Before Instruction W After Instruction W XORWF Syntax: Operands: Operation: ...
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... NOTES: DS70031A-page 68 Preliminary © 2001 Microchip Technology Inc. ...
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... Customizable toolbar and key mapping • A status bar • On-line help 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF The MPLAB IDE allows you to: • Edit your source files (either assembly or ‘C’) • One touch assemble (or compile) and download to PICmicro emulator and simulator tools (auto- matically updates all project information) • ...
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... MPLINK Object Linker/ MPLIB Object Librarian The MPLINK object linker combines relocatable objects created by the MPASM assembler and the MPLAB C17 and MPLAB C18 C compilers. It can also link relocatable objects from pre-compiled libraries, using directives from a linker script. The MPLIB object librarian is a librarian for pre- compiled code to be used with the MPLINK object linker ...
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... PIC17C76X, may be supported with an adapter socket. The PICSTART Plus development programmer is CE compliant. 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF 10.11 PICDEM 1 Low Cost PICmicro Demonstration Board The PICDEM 1 demonstration board is a simple board which demonstrates the capabilities of several of Microchip’s microcontrollers. The microcontrollers sup- ...
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... PICDEM 3 Low Cost PIC16CXXX Demonstration Board The PICDEM 3 demonstration board is a simple dem- onstration board that supports the PIC16C923 and PIC16C924 in the PLCC package. It will also support future 44-pin PLCC microcontrollers with an LCD Mod- ule. All the necessary hardware and software is included to run the basic demonstration programs ...
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... DEVELOPMENT TOOLS FROM MICROCHIP MCP2510 MCRFXXX HCSXXX 93CXX 25CXX/ 24CXX/ PIC18FXXX PIC18CXX2 PIC17C7XX PIC17C4X PIC16C9XX PIC16F8XX PIC16C8X PIC16C7XX PIC16C7X PIC16F62X PIC16CXXX PIC16C6X PIC16C5X PIC14000 PIC12CXXX Tools Software Emulators Debugger Programmers 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF Kits Eval and Boards Preliminary Demo DS70031A-page 73 ...
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... NOTES: DS70031A-page 74 Preliminary © 2001 Microchip Technology Inc. ...
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... Exposure to maximum rating conditions for extended periods may affect device reliability. 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF .....................................................................................................-0.3 to +7.0 V ................................................................. -0 ..........................................................-0 SSRF ) ........................................................................................................ ± ...
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... Note 1: The shaded region indicates the permissible combinations of voltage and frequency. 2: The maximum rated speed of the part limits the permissible combinations of voltage and frequency. Please reference the Product Identification System section for the maximum rated speed of the parts. FIGURE 11-2: rfPIC12C509AG/509AF VOLTAGE-FREQUENCY GRAPH 6.0 5.5 5.0 4 ...
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... DC CHARACTERISTICS: rfPIC12C509AG/509AF (Industrial) DC Characteristics Param Sym Characteristic No. D001 V Supply Voltage DD D002 V RAM Data Retention DR (2) Voltage D003 V V Start Voltage to ensure POR DD Power-on Reset D004 S V Rise Rate to ensure VDD DD Power-on Reset (3) D010 I Supply Current DD D010C D010A D020 I Power-Down Current PD D021 ...
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... Note 1: In EXTRC oscillator configuration, the OSC1/CLKIN pin is a Schmitt Trigger input not recommended that the rfPIC12C509AG be driven with external clock in RC mode. 2: The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions ...
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... When MCLR is asserted, the state of the OSC1/CLKIN and OSC2 pins are as follows: TABLE 11-2: CLKIN/CLKOUT PIN STATES WHEN MCLR ASSERTED Oscillator Mode EXTRC OSC1 pin is tristated and driven by external circuit INTRC OSC1 pin is tristate input 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF Min Typ GP0/GP1 38K 42K 42K 48K 42K 49K ...
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... Timing Parameter Symbology and Load Conditions The timing parameter symbols have been created following one of the following formats: 1. TppS2ppS 2. TppS T F Frequency Lowercase subscripts (pp) and their meanings CLKOUT cy cycle time drt device reset timer io I/O port Uppercase letters and their meanings: ...
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... Exceeding these specified limits may result in an unstable oscillator operation and/or higher than expected current consumption. When an external clock input is used, the “max” cycle time limit is “DC” (no clock) for all devices. 3: Instruction cycle period (T CY 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF – ...
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... TABLE 11-4: CALIBRATED INTERNAL RC FREQUENCIES Standard Operating Conditions (unless otherwise specified) AC Characteristics Operating Temperature Operating Voltage V Parameter Sym No. Internal Calibrated RC Frequency Internal Calibrated RC Frequency * These parameters are characterized but not tested. Note 1: Data in the Typical (“Typ”) column unless otherwise stated. These parameters are for design guidance only and are not tested ...
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... Note 1: Data in the Typical (“Typ”) column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. 2: Measurements are taken in EXTRC mode. 3: See Figure 11-3 for loading conditions. 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF 20, 21 – ...
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... FIGURE 11-6: RESET, WATCHDOG TIMER AND DEVICE RESET TIMER V DD MCLR Internal POR 32 DRT Timeout (Note 2) Internal RESET Watchdog Timer Reset I/O pin (Note 1) Note 1: I/O pins must be taken out of hi-impedance mode by enabling the output drivers in software. 2: Runs in MCLR or WDT Reset only in XT and LP modes. ...
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... These parameters are characterized but not tested. Note 1: Data in the Typical (“Typ”) column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF POR Reset Subsequent RESETS (1) 300 µs (typical) ...
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... Transmitter Characteristics: rfPIC12C509AG/509AF (Industrial) TABLE 11-9: TRANSMITTER DC CHARACTERISTICS* DC CHARACTERISTICS Param Sym Characteristic No. V Supply Voltage DDRF I Power-Down Current PDRF I Supply Current DDRF V Input Low Voltage ILRF V Input High Voltage IHRF I Input Leakage Current ILRF * These parameters are characterized but not tested. ...
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... FIGURE 12-1: CALIBRATED INTERNAL RC FREQUENCY RANGE VS. TEMPERATURE (V = 5.0V) DD (INTERNAL RC IS CALIBRATED TO 25°C, 5.0V) 4.50 4.40 4.30 4.20 4.10 4.00 3.90 3.80 3.70 3.60 3.50 - Temperature (Deg.C) 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF FIGURE 12-2: 4.50 4.40 4.30 4.20 Max. 4.10 4.00 3.90 3.80 Min. 3.70 3.60 3.50 -40 85 125 Preliminary or (mean - CALIBRATED INTERNAL RC FREQUENCY RANGE VS. TEMPERATURE (V = 2.5V) DD (INTERNAL RC IS CALIBRATED TO 25°C, 5 ...
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... TABLE 12-1: DYNAMIC I (TYPICAL) - WDT ENABLED, 25°C DD Oscillator Frequency External RC 4 MHz Internal RC 4 MHz XT 4 MHz LP 32 KHz *Does not include current through external R&C. FIGURE 12-3: TYPICAL I DD (WDT DIS, 25°C, FREQUENCY = 4MH 600 550 500 450 400 350 300 ...
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... V (Volts) DD FIGURE 12-6: SHORT DRT PERIOD VS. V 950 850 750 650 550 450 350 250 150 0 0 2.5 3.5 4.5 V (Volts) DD 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF FIGURE 12- Max +125 C -6 Max + Typ +25 C -10 .5 MIn –40 C 5.5 6.5 FIGURE 12- Min +125 C ...
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... FIGURE 12- 0.25 0.5 V (Volts) OL FIGURE 12-10 0.25 0.5 V (Volts) OL DS70031A-page 90 = 2.5 V FIGURE 12-11 Max -40 C -10 -15 -20 Typ +25 C -25 Min +85 C -30 Min +125 C -35 -40 3.5 0.75 1.0 FIGURE 12-12 Max - ...
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... FIGURE 12-13: TYPICAL IPD VS. V WATCHDOG DISABLED (25°C) 260 250 240 230 220 210 200 2.5 3.0 3.5 4.5 5.0 V (Volts) DD FIGURE 12-14: VTH (INPUT THRESHOLD VOLTAGE) OF GPIO PINS VS 1.8 Max (-40 to 125) 1.6 1.4 Typ (25 1.2 Min (-40 to 125) 1.0 0.8 0.6 0 2.5 3.5 4.5 V (Volts) DD 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF , DD 5.5 5.5 Preliminary DS70031A-page 91 ...
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... FIGURE 12-15: VIL, VIH OF NMCLR, AND T0CKI VS 3.5 3.0 2.5 2.0 1.5 1.0 0.5 2.5 3.5 4.5 V (Volts) DD DS70031A-page 92 Vih Max (-40 to 125) V Typ ( Min (-40 to 125 Max (-40 to 125 Typ ( Min (-40 to 125) IL 5.5 Preliminary 2001 Microchip Technology Inc. © ...
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... For PICmicro device marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF Example rfPIC 12C509AG/JW 9901CBA Example ...
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... Package Type: 18-Lead CERDIP 18-Lead Ceramic Dual In-line with Window (JW) - 300 mil (CERDIP Dimension Limits Number of Pins Pitch Top to Seating Plane Ceramic Package Height Standoff Shoulder to Shoulder Width Ceramic Pkg. Width Overall Length Tip to Seating Plane Lead Thickness ...
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... Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-013 Drawing No. C04-051 2001 Microchip Technology Inc. © rfPIC12C509AG/509AF Units INCHES* ...
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... Package Type: 20-Lead SSOP 20-Lead Plastic Shrink Small Outline (SS) - 209 mil, 5.30 mm (SSOP Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff § Overall Width Molded Package Width Overall Length Foot Length Lead Thickness Foot Angle ...
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... FSR I ............................................................ 23 I/O Interfacing .................................................................... 23 I/O Ports .................................. 24 I/O Programming Considerations .......................................... 70 ICEPIC In-Circuit Emulator .........................................................43 ID Locations ......................................................................... 22 INDF ............................................. 22 Indirect Data Addressing 2001 Microchip Technology Inc. ......................................................... 13 Instruction Cycle Instruction Flow/Pipelining ............................................. 58 Instruction Set Summary K KeeLoq Evaluation and Programming Tools L ............................................................ 21 Loading .................................................. 15 Memory Organization ...................................................... 16 Data Memory ................................................ 15 Program Memory ...
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... Timing Parameter Symbology and Load Conditions ........................................................... 23 TRIS Registers U .......................................... 33 UHF ASK/FSK Transmitter ................................................................. 33 CEPT ................................................................... 33 FCC ................................................. 33 Radio Frequency ......................................................... 33 Transmitter W ................................................. 53 Wake-up from SLEEP ......................................... 43 Watchdog Timer (WDT) ................................................................ 51 Period ................................ 51 Programming Considerations ................................................ 3 WWW, On-Line Support Z ........................................................................ 9 Zero bit DS70031A-page 98 ................. ........ Preliminary 2001 Microchip Technology Inc. ...
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... Conferences for products, Development Sys- tems, technical information and more • Listing of seminars and events 2001 Microchip Technology Inc. rfPIC12C509AG/509AF Systems Information and Upgrade Hot Line The Systems Information and Upgrade Line provides system users a listing of the latest versions of all of Microchip's development systems software products ...
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... Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y Device: rfPIC12C509AG/509AF Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs you find the organization of this data sheet easy to follow? If not, why? 4 ...
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... PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. X /XX XXX Pattern: Package: Temperature Range: Device Sales and Support Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom- mended workarounds ...
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... Palazzo Taurus Colleoni 1 20041 Agrate Brianza Milan, Italy Tel: 39-039-65791-1 Fax: 39-039-6899883 United Kingdom Arizona Microchip Technology Ltd. 505 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 5TU Tel: 44 118 921 5869 Fax: 44-118 921-5820 08/01/01 2001 Microchip Technology Inc. © ...