STW4811M STMicroelectronics, STW4811M Datasheet - Page 42

• Manufacturer Part Number: STW4811M
• Description: Power Management For Multimedia Processors
• Manufacturer: STMicroelectronics

Functional description
Note:
4.3.4
4.3.5
42/87
Main features
●
●
The definition of sleep mode is given in
●
VPLL
This LDO is dedicated to the multimedia processor PLL (1.05, 1.2, 1.3, 1.8 V) power supply
with 10 mA max full load ( power control registers -
Main features
●
●
●
VANA
This LDO is dedicated to the multimedia processor analog function (2.5 V) power supply
with 10 mA full load.
Main features:
●
●
Fixed 1.8 V output voltage
Two power domains:
–
–
Soft start circuitry at start up, from power off to high power mode, when PON ball
changes from “0” to “1”.
Programmable output voltage, ‘vpll_sel[1:0]’ bits of power control register -
and
Two power domains:
–
–
Soft start circuitry at start up, from power off to high power mode, when PON ball
changes from “0” to “1”.
2.5 V output voltage,
Two power domains
–
–
Table 24
‘High power mode’ when multimedia processor is in run mode - 600 mA full load
‘Low current mode’ when multimedia processor is in sleep mode, 5 mA current
capability.
Fast switching from low current to high power mode.
The regulator is in ‘low current mode’ when multimedia processor is in sleep
mode. PWREN signal indicates that the multimedia processor is about to switch to
run mode. VDDOK signal indicates to the multimedia processor that all supplies
are in the specified range.
‘High power mode’ 10 mA full load
‘Power down mode’ or ‘standby mode’ when regulators are switched off and there
is no power consumption (‘en_vpll’ bit of power control register -
‘High power mode’ 10 mA full load
‘Power down mode’ or ‘standby mode’ when regulators are switched off and there
is no power consumption (‘en_vana’ bit of power contro l register -
)
4.2.3: Sleep mode
Table 23
section.
and
Table 24
STw4811M/STw4811N
).
Table 24
Table 25
Table 23
)
),