ADN2891 Analog Devices, Inc., ADN2891 Datasheet
![no-image](/images/no-image-200.jpg)
ADN2891
Available stocks
Related parts for ADN2891
ADN2891 Summary of contents
Page 1
... The on-chip RSSI detector facilitates SFF-8472- compliant optical transceivers by eliminating the need for external RSSI detector circuitry. Additional features include a programmable loss-of-signal (LOS) detector and output squelch. The ADN2891 is available × 3 mm, 16-lead LFCSP. FUNCTIONAL BLOCK DIAGRAM AVCC AVEE DRVCC ...
Page 2
... ADN2891 TABLE OF CONTENTS Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 5 Thermal Resistance ...................................................................... 5 ESD Caution.................................................................................. 5 Pin Configuration and Function Descriptions............................. 6 Typical Performance Characteristics ............................................. 7 Theory of Operation ...................................................................... 10 Limiting Amplifier ..................................................................... 10 REVISION HISTORY 7/05—Rev Rev. A Changes to Table 1............................................................................ 3 Changes to Ordering Guide .......................................................... 13 3/05—Revision 0: Initial Version Loss of Signal (LOS) Detector .................................................. 10 Received Signal Strength Indicator (RSSI) ...
Page 3
... Measured at PD_CATHODE, with μ 3.3 3 +25 +95 °C T MIN 50 Ω Single-ended 660 850 mV p-p Differential 80 130 ps 20% to 80% Rev Page ADN2891 23 −10 − 1, BER ≤ − − 100 kΩ kΩ 23 − − 1 ≤ 1000 μ MAX ...
Page 4
... ADN2891 Parameter Min LOGIC INPUTS (SQUELCH Input High Voltage 2 Input Low Voltage IL Input Current LOGIC OUTPUTS (LOS Output High Voltage 2 Output Low Voltage OL Typ Max Unit Test Conditions/Comments V 0 μA I INH 6 μA I INL V Open drain output, 4.7 kΩ kΩ ...
Page 5
... THERMAL RESISTANCE J-STD-20 θ is specified for 4-layer PCB with exposed paddle soldered JA 125°C to GND. Table 3. Package Type 3 mm × 3 mm, 16-lead LFCSP Rev Page ADN2891 θ Unit JA 28 °C/W ...
Page 6
... PD_VCC P 16 PD_CATHODE AO Exposed Pad P Pad power digital input digital output analog input; and AO = analog output AVCC DRVCC 1 12 ADN2891 PIN OUTP 2 11 TOP VIEW NIN OUTN 3 10 (Not to Scale) AVEE DRVEE Figure 2. Pin Configuration ...
Page 7
... Figure 4. Eye of ADN2891 @ 25°C, 3.2 Gbps, and 500 mV Input 50ps/DIV Figure 5. Eye of ADN2891 @ 95°C, 3.2 Gbps, and 10 mV Input Figure 6. Eye of ADN2891 @ 95°C, 3.2 Gbps, and 500 mV Input Figure 7. Eye of ADN2891 @ 25°C, 155 Mbps, and 10 mV Input Rev Page ADN2891 50ps/DIV 1ns/DIV ...
Page 8
... ADN2891 70 60 –40°C 50 +95°C +25°C 40 +95°C 30 +25°C DEASSERTION 20 –40°C 10 ASSERTION 0 1k 10k R (Ω) TH Figure 8. LOS Trip and Release vs 10k R (Ω) TH Figure 9. LOS Electrical Hysteresis vs 6.0 6.3 6.6 6.9 7.2 7.5 7.8 ELECTRICAL HYSTERESIS (dB) Figure 10. Sample Lot Distribution— ...
Page 9
... TEMPERATURE (°C) Output and PD_CATHODE (Input) Current of 5 μA +100°C +30°C 200 400 600 800 PD_CATHODE CURRENT (μA) Figure 18. RSSI Linearity % vs. PD_CATHODE Current –40 – TEMPERATURE (°C) Figure 19. ADN2891 I Current vs. Temperature CC 80 100 –40°C 1000 100 120 ...
Page 10
... Additionally, TIA output offset drifts may degrade receiver performance. The ADN2891 limiting amplifier is a high gain device susceptible to dc offsets in the signal path. The pulse width distortion presented in the NRZ data or a distortion generated by the TIA may appear as dc offset or a corrupted signal to the ADN2891 inputs ...
Page 11
... C1–C4, C11: 0.01μF X5R/X7R DIELECTRIC, 0201 CASE C5, C7, C9, C10, C12: 0.1μF X5R/X7R DIELECTRIC, 0402 CASE C6, C8: 1nF X5R/X7R DIELECTRIC, 0201 CASE C11 R3 4.7kΩ TO 10kΩ C12 R2 ON HOST BOARD VCC Rev Page RSSI MEASUREMENT TO ADC C10 VCC HOST BOARD C4 ADN2891 ...
Page 12
... ADN2891 PCB Layout Figure 21 shows the recommended PCB layout. The 50 Ω transmission lines are the traces that bring the high frequency input and output signals (PIN, NIN, OUTP, and OUTN) to the SMA connectors with minimum reflection. To avoid a signal skew between the differential traces, each differential PIN/NIN and OUTP/OUTN pair should have matched trace lengths from the signal pins to the corresponding SMA connectors ...
Page 13
... Body, Very Thin Quad (CP-16-3) Dimensions shown in millimeters Package Description 16-Lead VQ_LFCSP, 500 pieces 16-Lead VQ_LFCSP, 1,500 pieces 16-Lead VQ_LFCSP, 5,000 pieces Evaluation Board Rev Page 0.50 0.40 0. 1.35 EXPOSED PAD 9 (BOTTOM VIEW 0.25 MIN Package Option CP-16-3 CP-16-3 CP-16-3 ADN2891 Branding F04 F04 F04 ...
Page 14
... ADN2891 NOTES Rev Page ...
Page 15
... NOTES Rev Page ADN2891 ...
Page 16
... ADN2891 NOTES © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05244–0–7/05(A) Rev Page ...