ADN2892 Analog Devices, Inc., ADN2892 Datasheet - Page 6

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ADN2892

Manufacturer Part Number
ADN2892
Description
3.3 V 4.25 Gb/s Limiting Amplifier
Manufacturer
Analog Devices, Inc.
Datasheet
ADN2892
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Note that there is an exposed pad on the bottom of the package that must be connected to the GND plane with filled vias.
Table 4. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Exposed Pad
1
P = power; DI = digital input; DO = digital output; AI = analog input; and AO = analog output.
Mnemonic
AVCC
PIN
NIN
AVEE
THRADJ
BW_SEL
LOS_INV
LOS
DRVEE
OUTN
OUTP
DRVCC
SQUELCH
RSSI_OUT
PD_VCC
PD_CATHODE
Pad
I/O Type
P
AI
AI
P
AO
DI
DI
DO
P
DO
DO
P
DI
AO
P
AO
P
1
Description
Analog Power Supply.
Differential Data Input, Positive Port, 50 Ω On-Chip Termination.
Differential Data Input, Negative Port, 50 Ω On-Chip Termination.
Analog Ground.
LOS Threshold Adjust Resistor.
With one 100 kΩ on-chip, pull-up resistor, BW_SEL = 0 for 1×/2× FC, BW_SEL = 1 for 4× FC.
With one 100 kΩ on-chip, pull-down resistor, LOS_INV = 1 inverts the LOS output
to be active low for SFF.
LOS Detector Output, Open Collector.
Output Buffer Ground.
Differential Data Output, CML, Negative Port, 50 Ω, On-Chip Termination.
Differential Data Output, CML, Positive Port, 50 Ω, On-Chip Termination.
Output Buffer Power Supply.
Disable Outputs, 100 kΩ On-Chip, Pull-Down Resistor.
Average Current Output.
Power Input for RSSI Measurement.
Photodiode Bias Voltage.
Connect to Ground.
AVCC
AVEE
NIN
PIN
Figure 2. Pin Configuration
1
2
3
4
Rev. 0 | Page 6 of 16
16
(Not to Scale)
5
ADN2892
TOP VIEW
15
6
14
7
13
8
12
10
11
9
DRVCC
OUTP
OUTN
DRVEE

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