ICM7232 Intersil Corporation, ICM7232 Datasheet - Page 6

• Manufacturer Part Number: ICM7232
• Description: Numeric/alphanumeric Triplexed Lcd Display Drivers
• Manufacturer: Intersil Corporation

Table of Features
Terminal Definitions
NOTES:
ICM7231BF
ICM7232AF
ICM7232BF
ICM7232CR
ICM7231 PARALLEL INPUT NUMERIC DISPLAY
AN1
AN2
BD0
BD1
BD2
BD3
A0
A1
A2
CS
ICM7232 SERIAL DATA AND ADDRESS INPUT
Data Input
WRITE Input
Data Clock
Input
DATA
ACCEPTED
Output
ALL DEVICES
Display
Voltage
V
Common
Line Driver
Outputs
Segment
Line Driver
Outputs
V
V
1. For Design reference only, not 100% tested.
2. CS has a special “mid-level” sense circuit that establishes a test mode if it is held near 3V for several ms. Inadvertent triggering of this
TERMINAL
DlSP
DD
SS
TYPE NUMBER
mode can be avoided by pulling it high when inactive, or ensuring frequent activity.
PIN NO.
3, 4, 5
6 - 29
6 - 35
30
31
32
33
34
35
37
38
39
38
39
37
40
36
1
1
2
Code B
Hexadecimal
Code B
Code B
Annunciator 1 Control Bit
Annunciator 2 Control Bit
Least Significant
Most Significant
Least Significant
Most Significant
Data Input Strobe/Chip Select (Note 2)
Data+ Address Shift Register Input
Decode, Output, and Reset Strobe
Data Shift Register and Control Logic
Clock
Handshake Output
Negative end of on-chip resistor string
used to generate intermediate voltage
levels for display. Shutdown Input.
(On ICM7231)
(On ICM7232)
Chip Positive Supply
Chip Negative Supply
OUTPUT CODE
DESCRIPTION
Both Annunciators on BP3
Both Annunciators on BP3
1 Annunciator BP1
1 Annunciator BP3
ANNUNCIATOR LOCATIONS
4-bit Binary
Data Inputs
3-bit Digit
Address Inputs
ICM7231, ICM7232
9-24
High = ON
Low = OFF
Input
Data
(See Table 1)
Input
Address
(See Table 2)
Trailing (Positive going) edge latches data, causes data input to be
decoded and sent out to addressed digit
HIGH = Logical One (1)
LOW = Logical Zero (O)
When DATA ACCEPTED Output is LOW, positive going edge of WRITE
causes data in shift register to be decoded and sent to addressed digit,
then shift register and control logic to be reset. When DATA ACCEPTED
Output is HIGH, positive going edge of WRITE triggers reset only.
Positive going edge advances data in shift register. ICM7232: Elev-
enth edge resets shift register and control logic.
Output LOW when correct number of bits entered into shift register.
Display voltage control. When open (or less than 1V from V
is shutdown; oscillator stops, all display pins to V
Drive display commons, or rows
Drive display segments, or columns.
Parallel Entry, 4-bit Data, 2-bit
Annunciators, 3-bit Address
Serial Entry, 4-bit Data, 2-bit
Annunciators, 4-bit Address
INPUT
See Table 3
HIGH = Logical One (1)
LOW = Logical Zero (0)
FUNCTION
8 Digits plus
16 Annunciators
10 Digits plus
20 Annunciators
DD
OUTPUT
.
DD
) chip