LT1399 Linear Technology Corporation, LT1399 Datasheet - Page 10

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LT1399

Manufacturer Part Number
LT1399
Description
Low Cost Dual And Triple 300mhz Current Feedback Amplifiers With Shutdown
Manufacturer
Linear Technology Corporation
Datasheet

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LT1398/LT1399/LT1399HV
A
Power Supplies
The LT1398/LT1399 will operate from single or split
supplies from 2V (4V total) to 6V (12V total). The
LT1399HV will operate from single or split supplies from
use equal value split supplies, however the offset voltage
and inverting input bias current will change. The offset
voltage changes about 600 V per volt of supply mis-
match. The inverting bias current will typically change
about 2 A per volt of supply mismatch.
Slew Rate
Unlike a traditional voltage feedback op amp, the slew rate
of a current feedback amplifier is not independent of the
amplifier gain configuration. In a current feedback ampli-
fier, both the input stage and the output stage have slew rate
limitations. In the inverting mode, and for gains of 2 or more
in the noninverting mode, the signal amplitude between the
input pins is small and the overall slew rate is that of the
output stage. For gains less than 2 in the noninverting mode,
the overall slew rate is limited by the input stage.
The input slew rate of the LT1398/LT1399/LT1399HV is
approximately 600V/ s and is set by internal currents and
capacitances. The output slew rate is set by the value of the
feedback resistor and internal capacitance. At a gain of 2
with 324 feedback and gain resistors and 5V supplies,
the output slew rate is typically 800V/ s. Larger feedback
resistors will reduce the slew rate as will lower supply
voltages.
Enable/ Disable
Each amplifier of the LT1398/LT1399/LT1399HV has a
unique high impedance, zero supply current mode which
is controlled by its own EN pin. These amplifiers are
designed to operate with CMOS logic; the amplifiers draw
zero current when these pins are high. To activate each
amplifier, its EN pin is normally pulled to a logic low.
However, supply current will vary as the voltage between
the V
does vary with (V
difference is less than 3V. For normal operation, it is
important to keep the EN pin at least 3V below the V
supply. If a V
10
2V (4V total) to 7.5V (15V total). It is not necessary to
PPLICATI
+
supply and EN is varied. As seen in Figure 1, +I
+
of less than 3V is desired, and the amplifier
O
+
U
– V
S
EN
), particularly when the voltage
I FOR ATIO
U
W
U
S
+
will remain enabled at all times, then the EN pin should be
tied to the V
mately 30 A when activated. If using CMOS open-drain
logic, an external 1k pull-up resistor is recommended to
ensure that the LT1399 remains disabled in spite of any
CMOS drain-leakage currents.
V
V
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
V
V
Figure 3. Amplifier Disable Time, A
S
IN
Figure 2. Amplifier Enable Time, A
S
IN
0
= 5V
= 5V
= 1V
= 1V
0
supply. The enable pin current is approxi-
T
V
A
+
= 25 C
= 5V
Figure 1. + I
1
R
R
R
R
F
G
F
G
= 324
= 324
= 324
= 324
2
V
V
= – 5V
+
3
– V
S
R
R
L
L
EN
vs (V
= 100
= 100
4
(V)
V
+
= 0V
5
– V
EN
6
1398/99 F01
)
1398/99 F02
1398/99 F03
V
V
7
= 2
= 2
sn13989 13989fas
OUTPUT
EN
OUTPUT
EN

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