MV5089 Zarlink Semiconductor, MV5089 Datasheet - Page 4

• Manufacturer Part Number: MV5089
• Description: Dtmf Generator
• Manufacturer: Zarlink Semiconductor

PIN FUNCTIONS
ROW AND COLUMN INPUTS
keyboard or with an electronic input. Figures 4 and 5 show
these input configurations and Fig.6 shows the internal chip
structure of these inputs.
when any single button is pushed.
single column causes the generation of that Column tone.
Connection of V
Column tones being generated. Connection of V
only generates no tone - a Column must be connected to V
columns, and the desired row, to V
OUTPUT TONE LEVEL
applied DC supply voltage.
designed to provide stability over the temperature range.
PIN
1
2
3,4,5,9
6
7,8
10
11,12,13,14
15
16
These inputs are compatible with the standard 2-of-8
When operating with a keyboard, dual tones are generated
With Single Tone Inhibit at V
A single Row tone only may be generated by connecting 2
The output tone level of the MV5089 is proportional to the
A regulated supply will normally be used which may be
V
SS
Figure 4: 2 of 8 DTMF keyboard
SS
NAME
V
TONE
DISABLE
Column 1-4
V
OSC In,
OSC Out
Any Key Down This is an NMOS transistor output which switches to VSS while any key is
Row 1-4
Single Tone
Inhibit
Tone Out
to more than one Column will result in no
DD
SS
DD
SS
DESCRIPTION
Positive Power Supply
This input has an internal pull-up resistor to V
tones are generated by ant key depression allowing the keyboard to be used for
purposes other than DTMF signalling.
These CMOS inputs are held at V
by the application of V
Negative Power Supply (OV)
On-chip inverter completes the oscillator when a 3,579545 MHz crystal is
connected to these pins. OSC In is the inverter input and OSC Out is the output.
depressed. Otherwise this output is high impedance. Switching is independent of
Tone Disable and Single Tone Inhibit.
As Column 1-4 inputs.
This input has a pull-up resistor to V
dual tones may be generated, but keyboard input combinations resulting
in single tone generation are inhibited. When VDD is applied single or
dual tones may be generated.
Emitter output of a bipolar NPN transistor whose collector is tied to V
this transistor is from an op-amp which mixes the row and column tones.
, connection of V
.
COL
ROW
SS
to Rows
SS
to a
SS
SS
.
.
SS
COLUMN
SS
by an internal pull-up resistor and are activated
INPUT
INPUT
ROW
. When left unconnected or tied to V
Figure 6: Row and Column inputs
V
V
V
V
D
V
V
DD
SS
DD
SS
D. When connected to V
DD
DD
Figure 5: Electronic input
R
R
R
C
PROTECTION
PROTECTION
STATIC
STATIC
DD
. Input to
SS
COLUMN
ROW
no
SS
Row input
sensing circuit
Column input
sensing circuit
,
3