104-DIO-48S Advanced Digital Logic, Inc., 104-DIO-48S Datasheet - Page 2

• Manufacturer Part Number: 104-DIO-48S
• Description: Pc/104 Digital I/o With Cos
• Manufacturer: Advanced Digital Logic, Inc.

D i g i t a l I / O
Chip
Number of I/O lines
Direction
Sink and source current
Pullup resistors
Change of state detection
(COS)
Throughput
Power output
I n t e r r u p t s
Number of interrupts
Interrupt requests
Interrupt sources
104-DIO-48S
104-DIO-24S
Block Diagram & Pin Con
Spec
Ordering Guide
cations
Ph. 858 490-0597 F. 858 490-0599; e-mail: [e-mail]; web:
Advanced Digital Logic, Inc.; 4411 Morena Blvd., Suite 101; San Diego, CA 92117-4345
82C55A (each supports 24 lines)
48 or 24 TTL/CMOS compatible
Programmable as inputs or outputs in two groups
of 4 and 8 per 82C55A
64mA and 32mA respectively
10K all input lines with optional pull-downs
Port by port selectable on rising and falling edge
Up to 1 Megabyte per second
Re-settable fused +5V at 500mA per 50-pin connector
11
IRQ's 3-7, 9-12, 14, 15
Counter/timer outputs, external interrupt input, or DIO
lines with change of state detection enabled by software
48 lines of digital I/O with change of state detection
24 lines of digital I/O with change-of-state detection
104-DIO-48S & 104-DIO-24S
ration
C o u n t e r / T i m e r s
Chip
Counter/timers
Maximum input frequency
On-board time-base
Signal type
Input voltage
Output voltage
G e n e r a l
Power required
Operating temperature
Storage temperature
Operating humidity
Port C Lo
Port C Lo
Port C Lo
Port C Lo
Port C Hi
Port C Hi
Port C Hi
Port C Hi
Port B
Port B
Port B
Port B
Port B
Port B
Port B
Port B
Port A
Port A
Port A
Port A
Port A
Port A
Port A
Port A
+5 VDC
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
I/O Header
01
03
05
07
09
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
PC/104-Digital I/O Board
02
04
06
08
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
Type 82C54
3 x 16 bit
10MHz
1MHz
TTL
Logic low: -0.5V min, 0.8V max;
Logic high: 2.0V min, 5.0V max
Logic low: 0.0V min, 0.4V max;
Logic high: 3.0V min, 5.0V max
+5V at 50mA typical, all outputs open
0 to 70°C, optional -40 to +85°C, all versions
-50 to 120°C
5% to 95% RH, non-condensing
www.adl-usa.com
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Clock 0 Inpu t
Clock 2 Inpu t
Gate 1 Input
Output 0
Output 2
CTR/Timer
01
03
05
07
09
02
04
06
08
10
Gate 0 Input
1MHz Clock (out)
Output 1
Gate 2 Input
Ground