A3995 Allegro MicroSystems, A3995 Datasheet - Page 6

• Manufacturer Part Number: A3995
• Description: DMOS Dual Full Bridge PWM Motor Driver
• Manufacturer: Allegro MicroSystems

A3995
Device Operation
dc motors. The currents in each of the output full-bridges, all
N-channel DMOS, are regulated with fixed off-time pulse width
modulated (PWM) control circuitry. The peak current to each full
bridge is set by the value of an external current sense resistor,
R
If the logic inputs are pulled up to VDD, it is good practice to use
a high value pullup resistor in order to limit current to the logic
inputs should an overvoltage event occur. Logic inputs include:
PHASEx, ENABLEx, and MODE.
Internal PWM Current Control
trolled by a fixed off-time PWM current control circuit that limits
the load current to a desired value, I
of source and sink DMOS outputs are enabled and current flows
through the motor winding and R
current sense resistor equals the voltage on the VREFx pin, the
current sense comparator resets the PWM latch, which turns off
the source driver.
The maximum value of current limiting is set by the selection of
R
function approximated by:
Note: It is critical to ensure that the maximum rating of ±500 mV
on each SENSEx pin is not exceeded.
Fixed Off-Time
uses a one shot circuit to control the time the drivers remain off.
The one shot off-time, t
Blanking
comparator when the outputs are switched by the internal current
control circuitry. The comparator output is blanked to prevent
false detections of overcurrent conditions, due to reverse recovery
currents of the clamp diodes, or to switching transients related
to the capacitance of the load. The driver blank time, t
approximately 3 μs.
Phase Input (PHASEx)
determines the direction of rotation of the motor.
Sx
S
and the voltage at the VREF input with a transconductance
, and a reference voltage, V
This function blanks the output of the current sense
The internal PWM current control circuitry
I
TripMax
The A3995 is designed to operate two
off
, is internally set to 30 µs.
= V
The state of the PHASEx input
REFx
REF
Sx
. When the voltage across the
TRIP
.
/ (3×R
Each full-bridge is con-
. Initially, a diagonal pair
S
DMOS Dual Full Bridge PWM Motor Driver
)
Functional Description
Functional Description
BLANK
, is
Control Logic
applying a PWM signal together with the PHASE or ENABLE
inputs. Fast or slow current decay during the off-time is selected
via the MODE pin. Synchronous Rectification is always active
regardless of the state of the MODE pin.
Charge Pump (CP1 and CP2)
generate a gate supply greater than the V
source-side DMOS gates. A 0.1 μF ceramic capacitor should be
connected between CP1 and CP2 for pumping purposes. A 0.1 μF
ceramic capacitor is required between VCP and VBBx to act as a
reservoir to operate the high-side DMOS devices.
Shutdown
perature, or low voltage on VCP), the outputs of the device are
disabled until the fault condition is removed. At power-up, the
undervoltage lockout (UVLO) circuit disables the drivers.
Synchronous Rectification
triggered by an internal fixed off-time cycle, load current will
recirculate. The A3995 synchronous rectification feature will
turn on the appropriate MOSFETs during the current decay. This
effectively shorts the body diode with the low R
significantly lowers power dissipation. When a zero current level
is detected, synchronous rectification is turned off to prevent
reversal of the load current.
MODE
decay mode and slow decay mode. A logic high puts the device
in slow decay mode. Synchronous rectification is always enabled
when ENABLE is low.
Braking
device in slow decay mode via the MODE pin and applying an
ENABLE chop command. Because it is possible to drive current
in both directions through the DMOS switches, this configura-
tion effectively shorts the motor-generated BEMF as long as the
ENABLE chop mode is asserted. The maximum current can be
approximated by V
the maximum ratings of the device are not exceeded in worst case
braking situations: high speed and high inertia loads.
Control input MODE is used to toggle between fast
The Braking function is implemented by driving the
In the event of a fault (excessive junction tem-
Dc motor commutation is accomplished by
BEMF
/R
L
115 Northeast Cutoff, Box 15036
. Care should be taken to ensure that
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 [phone]
www.allegromicro.com
When a PWM-off cycle is
The charge pump is used to
BB
in order to drive the
DS(on)
driver. This
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