MB15F07SL Fujitsu Media Devices, MB15F07SL Datasheet - Page 10

• Manufacturer Part Number: MB15F07SL
• Description: Dual Serial Input PLL Frequency Synthesizer
• Manufacturer: Fujitsu Media Devices

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10
MB15F07SL
Table 4. Binary 11-bit Programmable Counter Data Setting
Table 5. Binary 7-bit Swallow Counter Data Setting
Table 6. Prescaler Data Setting
Table 7. Phase Comparator Phase Switching Data Setting
Prescaler
divide ratio
VCO polarity
Divide ratio
Divide ratio
Note: Divide ratio less than 3 is prohibited.
Note: Divide ratio (A) range = 0 to 127
Note: Z = High-impedance
fr > fp
fr = fp
fr < fp
2047
127
(N)
(N)
3
4
0
1
Depending upon the VCO and LPF polarity, FC bit should be set.
FC
N11
A7
0
0
1
0
0
1
1,
PLL 1
PLL 2
FC
(1)
H
Z
L
2
N10
A6
= “H”
0
0
1
0
0
1
Do
A5
1,
N9
0
0
1
0
0
1
Do
SW = “H”
FC
64/65
64/65
2
A4
1,
N8
0
0
1
0
0
1
FC
(2)
H
Z
L
2
= “L”
A3
N7
0
0
1
0
0
1
SW = “L”
128/129
128/129
A2
N6
0
0
1
0
0
1
A1
N5
0
1
1
0
0
1
VCO Output
Frequency
N4
0
0
1
N3
1
0
1
N2
1
0
1
LPF Output Voltage
N1
1
0
1
(1)
(2)