MB1508 Fujitsu Microelectronics, Inc., MB1508 Datasheet - Page 4

• Manufacturer Part Number: MB1508
• Description: Serial Input PLL Frequency Synthesizer on Chip 2.5 GHZ Prescaler
• Manufacturer: Fujitsu Microelectronics, Inc.

FUNCTIONAL DESCRIPTIONS
DIVIDE RATIO SETTING
SERIAL DATA INPUT
On rising edge of clock shifts one bit of the data into the shift register.
When the load enable is high, the data stored in the shift register is transferred to the latch.
24 bit of serial data format is shown below.
5-BIT SWALLOW COUNTER DIVIDE RATIO (A1 to A5)
12-BIT PROGRAMMABLE COUNTER DIVIDE RATIO (N1 to N12)
4
MB1508
A
1
Divide ratio of swallow
Divide Ratio
Divide ratio can be set using the following equation:
f
f
P:
N:
A:
f
R:
counter setting bit
Divide
vco
vco
osc
Ratio
4095
A
2
31
32
33
34
A
0
1
2
LSB
:
:
=
A
3
[(P x N)+ (16 x A] x f
Output frequency of external voltage controlled oscillator (VCO)
Preset divide ratio of an internal dual modulus prescaler (256 or 512)
Preset divide ratio of binary 12-bit programmable counter (32 to 4095)
Preset divide ratio of binary 5-bit swallow counter (0 to 31)
Reference oscillator frequency
Preset divide ratio of reference counter (256, 512, 1024, 2048)
A
4
12
A
N
5
0
0
0
1
0
0
0
1
A
5
N
1
11
A
N
4
0
0
0
1
0
0
0
1
osc
N
2
R
10
N
3
N
A
3
0
0
0
1
0
0
0
1
N
4
Divide ratio of programmable
Data Input Flow
A
N
2
0
0
1
1
9
0
0
0
1
N
5
counter setting bit
N
6
A
N
1
0
1
0
1
8
0
0
0
1
N
7
N
8
N
7
0
0
0
1
prescaler setting bit
N
9
Divide ratio of
N
N
6
1
1
1
1
1
0
11
N
N
5
0
0
0
1
N
1
2
W
S
N
4
0
0
0
1
R
1
R
2
N
3
0
0
0
1
Divide ratio of reference
counter setting bit
C
B
4
Band switch
setting bit
N
2
0
0
1
1
C
B
3
MSB
B
C
2
N
1
0
1
0
1
B
C
1