MB88347-P Fujitsu Microelectronics, Inc., MB88347-P Datasheet - Page 5

• Manufacturer Part Number: MB88347-P
• Description: R-2r Type 8-bit D/A Converter With op Amp Output Buffers
• Manufacturer: Fujitsu Microelectronics, Inc.

OVERVIEW
The MB88347 is a R-2R resistor ladder type, 8-bit resolution digital-to-analog converter (DAC) device. The MB88347
has 8 channels of D/A converters with operational amplifier output buffers. 8-bit digital data are loaded into internal
data latches by individual DAC channel units. The loaded digital data are converted into analog DC voltages through
the internal D/A converter in max. 100 s settling time. And the analog DC voltages source/sink the output current
through the operational amplifier output buffers. For cascade connection, a serial data output is provided.
DEVICE CONFIGURATION
As illustrated in BLOCK DIAGRAM, the MB88347 device is composed by the digital block (MCU interface) and
analog block (D/A converter with operational amplifier output buffers). The digital block consists of a 12-bit shift
register, a 4-bit address decoder, and 8-channels of 8-bit data latches. The analog block includes 8-channels of 8-
bit D/A converters with operational amplifier output buffers connecting to the data latches. For electrically stable
operation the power supply and ground lines are separate between the digital block (MCU interface) and operational
amplifier output buffers, and analog block except operational amplifier output buffers.
DEVICE OPERATION
Figure 2 shows the input/output timing. A 12-bit address/data is serially input into the shift register through the DI
pin synchronously with the rising edge of CLK. The format of the shift register is shown in Figure 3. The lower 8
bits (D7 to D0) are data bits to be converted, and the upper 4 bits are address bits (D11 to D8) to select a data latch
to be written. A high level on the LD pin loads the address decoder with the 4-bit address to select a data latch,
and writes the 8-bit data into a selected data latch. Figure 4 shows the data latch address map, and Table 2, address
decoding. 8-bit data written into individual data latches are converted into analog DC voltages, dividing the supply
voltage |V
individual D/A converter outputs can source up to 1.0 mA of the output current. Figure 5 shows a configuration of
the R-2R resistor ladder D/A converter with operational amplifier, and Table 3 analog DC voltages corresponding
to each digital data.
CLK
AOx
FUNCTIONAL DESCRIPTION
LD
DI
DD
-V
SS
| through R-2R resistor ladders of D/A converters. The operational amplifier output buffers at
MSB
D11
D10
D9
D8
Figure 2 Input/Output Timing
Previous Data
D2
D1
LSB
D0
MB88347
New Data
5