CMX969 Consumer Microcircuits Limited, CMX969 Datasheet - Page 28

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CMX969

Manufacturer Part Number
CMX969
Description
RD-LAP/MDC4800/Motient/ARDIS4-Level FSK Packet Data Modem 
Manufacturer
Consumer Microcircuits Limited
Datasheet

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RD-LAP/MDC4800 Motient/ARDIS
Status Register B1: MDC Mode: Received Frame Sync Type
In receive MDC mode this bit reflects the type of Frame Synchronisation pattern received:
Status Register B0: MDC Mode: SBIT - Received Channel Status Bit
In receive MDC mode this bit reflect the value of the latest received channel status bit. In transmit mode, this
bit will be '0'.
1.5.5.6 Data Quality Register
In receive mode, the CMX969 continually measures the 'quality' of the received signal, by comparing the
actual received waveform against an internally generated 'ideal' 2 or 4-level FSK baseband signal.
The result is placed into bits 3-7 of the Data Quality Register for the µC to read at any time, bits 0-2 being
always set to '0'. Figure 12 shows how the value (0-255) read from the Data Quality Register varies with
received raw (uncorrected) bit error rate:
The Data Quality readings are only valid when the modem has successfully acquired signal level and timing
lock for at least 64 symbol times. A low reading will be obtained if the received signal waveform is distorted in
any significant way.
2001 Consumer Microcircuits Limited
‘0’ indicates Frame Sync SYNC1 ($07092A446F, msb first)
‘1’ indicates Frame Sync SYNC2 (logical inverse of SYNC1)
1.E-01
1.E-02
1.E-03
1.E-04
1.E-05
1.E-06
0
Figure 12 Typical Data Quality Reading vs BER (uncorrected)
50
Average DQ Reading
100
28
150
200
250
CMX969
D/969/5

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