CMX269AE2 MX-COM, Inc., CMX269AE2 Datasheet - Page 4

• Manufacturer Part Number: CMX269AE2
• Description: 1200/2400/4800bps MSK modem
• Manufacturer: MX-COM, Inc.

1200/2400/4800bps MSK Modem
2. Signal List
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
E2
10
11
12
13
14
15
16
18
1999 MX-COM, Inc.
1
2
3
5
7
8
9
Pin No.
P6
10
11
12
13
14
15
17
1
2
3
5
6
7
8
9
D3
10
11
12
13
14
15
1
2
3
4
5
6
7
8
9
Bandpass Out
TX Signal Out
Carrier Detect
RX Sync Out
TX Sync Out
RX Signal In
www.mxcom.com tel: [phone] 744 5050 fax: [phone]
TX
TX Data In
RX Enable
Unclocked
Xtal/Clock
Data Out
Data Out
Clocked
Name
ENABLE
XTAL
V
V
BIAS
SS
Signal
output
output
output
output
output
output
output
output
power
power
Type
input
input
input
input
input
4
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The input to the on-chip inverter, for use with either a
1.008MHz or a 4.032MHz Xtal or external clock.
Clock frequency selection is by the “Clock Rate”
input pin. The selection of this frequency will affect
the operational Data Rate of this device. Refer to
Table 3.
As specified in the Performance Specifications, this
input signal should be actively clocked (either driven
from an external source or via an XTAL circuit).
Output of the on-chip inverter.
A squarewave, produced on-chip, to synchronize the
input of logic data and transmission of the MSK
signal. See Figure 8 and Section 4.1.
When the transmitter is enabled, this pin outputs the
(140-step pseudo sinewave) MSK signal. See
Figure 8. With the transmitter disabled, this output is
set to a high-impedance state.
Serial logic data to be transmitted is input to this pin.
A logic ‘0’ will enable the transmitter. See Figure 8.
A logic ‘1’ at this input will put the transmitter into
powersave while forcing “TX Sync Out” to a logic ‘1’
and “TX Signal Out” to a high-impedance state. This
pin is internally pulled to V
The output of the RX Bandpass Filter. This output
impedance is typically 10k and may require
buffering prior to use.
The control of the RX function. The control of other
outputs is provided in Table 2
The output of the on-chip analog bias circuitry. Held
internally at V
V
Enable notes. This bias voltage is maintained under
all powersave conditions.
The recovered asynchronous serial data output from
the receiver.
The recovered synchronous serial data output from
the receiver. Data is latched out by the recovered
clock, available at the “RX Sync Out”. See Figure 9
and Figure 11.
When an MSK signal is being received this output is
a logic ‘1’.
The MSK signal input for the receiver. This input
should be coupled via a capacitor, C3.
A flywheel squarewave output. This clock will
synchronize to incoming RX MSK data.
See Figure 9 and Figure 11.
Negative supply (GND).
SS
by a capacitor (C2). See Figure 2 and RX
DD
/2, this pin should be bypassed to
CMX469A PRELIMINARY INFORMATION
Description
DD
.
Doc. # 20480191.002