SI9122 Vishay Siliconix, SI9122 Datasheet - Page 10

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SI9122

Manufacturer Part Number
SI9122
Description
500-kHz Half-Bridge DC-DC Converter With Integrated Secondary Synchronous Rectification Drivers
Manufacturer
Vishay Siliconix
Datasheet

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Si9122
Vishay Siliconix
Current Limit
Current mode control providing constant current operation is
achieved by monitoring the differential voltage between the
CS1and CS2 pins which are connected across a primary
low-side sense resistor. Once this differential voltage exceeds
the 100-mV trigger point, the voltage on the C
pulled lower at a rate proportional to the excess voltage and the
value of the external capacitor connected between the
C
exceeds 150 mV the C
resulting in minimum duty cycle and frequency immediately.
Lowering the C
output drive being taken over by the current limit control loop.
Current control works to initially reduce the switching duty
cycle down to D
cycle is accompanied by a reduction in switching frequency at
a rate proportional to the duty cycle. This prevents the on time
of the primary drivers f
avoiding a current tail. Frequency reduction occurs to a
maximum of one fifth of the nominal frequency.
With constant current mode control of on time and with
reduced operating frequency, protection of the MOSFET
switches is increased during fault conditions. Minimum duty
cycle and reduced frequency switching continues for the
duration of the fault condition. The converter reverts to voltage
mode operation immediately whenever the primary current
fails to reach the limit level. C
in current limit.
The soft-start function does not apply under current limit as this
would constitute hiccup mode operation.
V
The chip provides a means of sensing the voltage of V
withholding operation of the output drivers until a minimum
voltage of V
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10
CS1
CS2
IN
L_CONT
Blank
Voltage Monitor –V
pin and ground. If the voltage between CS1 and CS2
REF
L_CONT
(3.3 V, 300-mV hysteresis), is achieved. This
MIN
+
AV
(12.5%). Further reduction in the duty
L_CONT
nom
voltage results in PWM control of the
INDET
from reducing below 100 ns and
Peak Detect
L_CONT
capacitor is discharged rapidly
clamps to 6.5 V when not
A
A
V
V
150 mV
100 mV
Figure 6 .
L_CONT
IN
pin is
, and
Current Limit Circuit
+
+
GM
GM
is achieved by choosing an appropriate resistive tap between
the ground and V
reference voltage. When the applied voltage is greater than
V
provides the input to the voltage feed forward function.
However, if the divided voltage applied to the V
greater than V
switching until the voltage drops below V
resistive tap on the V
the normal V
Alternatively, a zener clamp diode from V
also be used.
Shutdown Mode
If V
350 mV(V
powers down all unnecessary functions of the controller,
ensures that the primary switches are off and results in a low
level current demand from the V
REF
INDET
, the output drivers are activated as normal. V
V
CC
is forced below the lower threshold, a minimum of
SD
I
120 mA (nom)
I
0 − 240 mA (nom)
PU
PD
V
Figure 5.
), the device will enter SHUTDOWN mode. This
REF
CC
CC
(Si9122)
operating voltage to avoid this condition.
−0.3 V, the high-side driver, D
IN
V
INEXT
C
, and comparing this voltage with the
2 nF
IN
V
REG_COMP
EXT
High-Voltage Pre-Regulator Circuit
IN
divider must be set to accommodate
HV
V
OFFSET
R
DMOS
EXT
IN
14.5 V
or V
AV
S-41944—Rev. F, 18-Oct-04
CC
C
Document Number: 71815
CC
PNP Ext
L_CLAMP
INDET
supplies.
−0.3 V. Thus, the
OSC
V
C
0.5 mF
CC
to GND may
VCC
INDET
H
Auxillary
V
INDET
C
R
C
GND
, will stop
CC
L_CONT
EXT
EXT
pin is
also

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