MCP3221 Microchip Technology, MCP3221 Datasheet - Page 16

• Manufacturer Part Number: MCP3221
• Description: Low Power 12-Bit A/D Converter With I2C Interface
• Manufacturer: Microchip Technology

MCP3221
5.2
The address byte is the first byte received following the
START condition from the master device. The first part
of the control byte consists of a 4-bit device code,
which is set to 1010 for the MCP3221. The device code
is followed by three address bits: A2, A1 and A0. The
default address bits are 1001. Contact the Microchip
factory for additional address bit options. The address
bits allow up to eight MCP3221 devices on the same
bus and are used to determine which device is
accessed.
The eighth bit of the slave address determines if the
master device wants to read conversion data or write to
the MCP3221. When set to a ‘1’, a read operation is
selected. When set to a ‘0’, a write operation is
selected. There are no writable registers on the
MCP3221. Therefore, this bit must be set to a ’1’ in
order to initiate a conversion.
The MCP3221 is a slave device that is compatible with
the I
connection diagram is shown in Figure 6-2. Communi-
cation is initiated by the microcontroller (master
device), which sends a START bit followed by the
address byte.
On completion of the conversion(s) performed by the
MCP3221, the microcontroller must send a STOP bit to
end communication.
The last bit in the device address byte is the R/W bit.
When this bit is a logic ‘1’, a conversion will be exe-
cuted. Setting this bit to logic ‘0’ will also result in an
“acknowledge” (ACK) from the MCP3221, with the
device then releasing the bus. This can be used for
device polling. Refer to Section 6.3, “Device Polling”,
for more information.
FIGURE 5-2:
DS21732B-page 16
Note 1: Contact Microchip for additional address bits.
2
C 2-wire serial interface protocol. A hardware
START
1
Device Addressing
Device Code
0
SLAVE ADDRESS
0
Device Addressing.
1
Address Bits
1
READ/WRITE
0
1
(1)
R/W A
5.3
This section will describe the details of communicating
with the MCP3221 device. Initiating the sample-and-
hold acquisition, reading the conversion data and
executing multiple conversions will be discussed.
5.3.1
The acquisition and conversion of the input signal
begins with the falling edge of the R/W bit of the
address byte. At this point, the internal clock initiates
the sample, hold and conversion cycle, all of which are
internal to the ADC.
FIGURE 5-3:
Address Byte.
FIGURE 5-4:
Continuous Conversions.
SDA
SCL
SDA
SCL
Executing a Conversion
Start
D8
Bit
17 18 19 20 21 22 23 24 25 26
INITIATING THE SAMPLE AND
HOLD
1
1
D7
Device bits
0
D6 D5 D4
2
Lower Data Byte (n)
t
Initiating the Conversion,
Initiating the Conversion,
ACQ
initiated here
t
ACQ
initiated here
3
0
Address Byte
2003 Microchip Technology Inc.
+ t
+ t
4
1 A2 A1 A0 R/W
CONV
CONV
Address bits
D3 D2 D2
5
is
6
is
7
D0
8
9