CS98000 Cirrus Logic, Inc., CS98000 Datasheet - Page 21

• Manufacturer Part Number: CS98000
• Description: DVD Video Processor
• Manufacturer: Cirrus Logic, Inc.

3.7
The system control functions are used to coordinate
the activities of the multiple processors, and to pro-
vide the supporting system operations. Four 32-bit
communication registers are available for inter-
processor communication, and eight semaphore
registers are used for resource locking. Timers are
available for general-purpose functions, as well as
more specialized functions such as watchdog tim-
ers and performance monitoring.
The large number of general purpose I/Os offers
flexibility in system configurations. An I
allows for control of other I
video encoder. An I
pins, and can be used for debug functions. Inter-
rupts can be generated on specific or generic
events. Infrared inputs can be filtered to make them
free of glitches or stored unfiltered into memory.
Control of all the internal clocks is also possible.
Internal PLLs are used to generate the internal sys-
tem and memory clocks and audio clocks of any
widely used frequency.
3.8
The CS98000 has a programmable interface port
which can be configured to connect to industry
standard CD/DVD loaders without external glue
logic. The CD/DVD interface fully supports many
popular CD/DVD loaders. The interface consists of
DVD control and data ports and an optional CD
control/data port.
The CS98000 hardware manages the DVD inter-
face and moving data to an arbitrary size input
FIFO in DRAM. The same interface pins can be
optionally configured as a generic 16-bit host mas-
ter port. In this mode, the CS98000 can control up
to four devices (using 4 chip select outputs), each
of which may use different protocol and timing.
The interface can be set up in ATAPI mode, to con-
nect directly to any
ATAPI DVD loader (using two chip selects). Si-
multaneously, the other two chip selects can be
System Control Functions
DVD/ATAPI Interface
2
C slave port shares the same
2
C devices, such as a
2
C master
configured to connect to other devices, such as a
super I/O chip or hard disk.
A third option is to configure the interface for mi-
cro-less DVD loader operation, which may also be
configured to connect without external glue logic.
3.9
Compressed MPEG data is read from the DVD disk
into an input FIFO in DRAM. The data flow
(DMA) controller moves Video packets from the
input FIFO into the MPEG decoder’s input FIFO
(also in DRAM). The DMA controller can also per-
form advanced functions such as start code search,
relieving the RISC processors. The System Syn-
chronization function is used to control the timing
of MPEG picture decoding. The MPEG Video de-
coder processes I, B, and P frames, and writes to
video frame buffers in DRAM for output to the dis-
play. Special anti-tearing logic ensures that cur-
rently displayed frame buffers are not overwritten.
3.10
Compressed Audio data is read from the DVD disk
into an input FIFO in DRAM. The data is decom-
pressed, then written to a PCM output FIFO, also in
DRAM. Presentation time stamps (PTS) are ex-
tracted from the stream to update the STC, in order
to maintain audio/video synchronization.
The DMA and decompression stages of audio pro-
cessing can be done with a combination of the
DMA unit, DSP, and RISC processors. The DSP is
optimized for audio processing, so most common
formats can be handled by the DSP alone, includ-
ing AC-3, DTS, MPEG2 audio, and MP3. The DSP
has enough reserve bandwidth to handle the
Karaoke echo-mix and pitch shift, and AC-3 down-
mix functions.
The audio output data is written into a DRAM
FIFO in 16-, 18-, 20- or 24-bit PCM format. A flex-
ible audio output stage can simultaneously output 8
channels of PCM data to audio DACs, or 6 chan-
nels of audio data plus an IEC-958 encoded output,
MPEG Video Decoding
Audio Processing
CS98000
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