CS98100 Cirrus Logic, Inc., CS98100 Datasheet - Page 20

• Manufacturer Part Number: CS98100
• Description: DVD Video Processor With Progressive Scan
• Manufacturer: Cirrus Logic, Inc.

ety of system interface functions. Interrupts can be
generated on specific or generic events. Infrared in-
puts can be filtered of glitches or stored unfiltered
into memory. Power-down control of the internal
clocks is also possible. Internal PLLs are used to
generate the internal system and memory clocks,
and audio clocks of any widely used frequency.
3.6
The CS98100 has a programmable interface port,
which can be configured to connect to industry
standard CD/DVD loaders without external glue
logic. The CD/DVD interface fully supports a wide
range of popular CD/DVD loaders. The interface
consists of DVD control and data ports, and an op-
tional CD control/data port. The CS98100 hard-
ware manages the DVD interface and moving data
to an arbitrary size input FIFO in DRAM.
The same interface pins can be optionally config-
ured as a generic 16-bit host master port. In this
mode, the CS98100 can control up to four devices
(using 4 chip select outputs), each of which may
use different protocol and timing. The interface can
be set up in ATAPI mode, to connect directly to any
ATAPI DVD loader (using two chip selects). Si-
multaneously, the other two chip selects can be
configured to connect to other devices, such as a
super I/O chip or hard disk.
A third option is to configure the interface for mi-
cro-less DVD loader operation, which may also be
configured to connect without external glue logic.
3.7
The CS98100 has a 4-pin serial port which interfac-
es to the data port of popular low-cost DVD load-
ers. This type of loader provides for low system
cost by eliminating the track buffer, interface
FIFO, and flow control logic. The CS98100 con-
tains a large internal SRAM to handle high burst
data rates, without requiring reverse flow control.
The track buffer resides in the CS98100 SDRAM,
which reduces system complexity and simplifies
the software architecture. The CS98100 performs
20
DVD/ATAPI Interface
Serial DVD Interface
error detection, sector number tracking, and inter-
rupt generation.
3.8
Compressed MPEG data is read from the DVD disk
into an input FIFO in DRAM. The data flow
(DMA) controller moves Video packets from the
input FIFO into the MPEG decoder’s input FIFO
(also in DRAM). The DMA controller can also per-
form advanced functions such as start code search,
relieving the RISC processor. The System Sync
function is used to control the timing of MPEG pic-
ture decoding. The MPEG Video decoder process-
es I, B and P frames, and writes to video frame
buffers in DRAM, for output to the display. Special
anti-tearing logic ensures currently displayed
frame buffers are not overwritten.
3.9
Compressed Audio data is read from the DVD disk
into an input FIFO in DRAM. The data is decom-
pressed, then written to a PCM output FIFO, also in
DRAM. Presentation time stamps (PTS) are ex-
tracted from the stream to update the STC, in order
to maintain audio/video synchronization. The
DMA and decompression stages of audio process-
ing can be done with a combination of the DMA
unit, DSP and RISC processors. The DSP is opti-
mized for audio processing, so most common for-
mats can be handled by the DSP alone, including
AC-3, MPEG2 audio, and others. The DSP has
enough reserve bandwidth to handle the Karaoke
echo-mix and pitch shift, and AC-3 down-mix
functions.
The audio output data is written into a DRAM
FIFO in 16, 18, 20 or 24-bit PCM format. A flexi-
ble audio output stage can simultaneously output 8
channels of PCM data to audio DACs, plus an IEC-
958 encoded output, at up to 96 kHz. The IEC-958
output has fully programmable channel status
(commercial), and provides a flexible solution to
support all IEC-958 modes for User Data.
MPEG Video Decoding
Audio Processing
CS98100